Lucia Acosta

Highly Linear Tunable CMOS

A comprehensive analysis of tunable transconductor topologies based on passive resistors is presented. Based on this analysis, a new CMOS transconductor is designed, which features high linearity, simplicity, and robustness against geometric and parametric mismatches. A novel tuning technique using just a MOS transistor in the triode region allows the adjustment of the transconductance in a wide range without affecting the voltage-to-current conversion core. Measurement results of the transconductor fabricated in a 0.5- mum CMOS technology confirm the high linearity predicted. As an application, a third-order Gm-C tunable low-pass filter fabricated in the same technology is presented. The measured third-order intermodulation distortion of the filter for a single 5-V supply and a 2-Vpp two-tone input signal centered at 10 MHz is -78 dB.

Gm{\hbox{-}}C

Floating-gate and quasi-floating gate MOS transistors can be efficiently employed to design CMOS transconductors. These transistors allow achievement of relevant features in a compact and simple way, such as rail-to-rail input range, continuous transconductance tuning, and class AB operation. This paper illustrates how these techniques can be applied by employing them in the design of two transconductors, which have been fabricated in a 0.5 μm CMOS process. Measurement results confirm the advantages of the proposed approach.

Low-Pass Filter

A technique to achieve highly linear scaling of differential currents in CMOS technology is presented. It is based on operation in weak or moderate inversion, and features performance improvements over previous proposals aimed to the same goal, like reduced supply voltage requirements, increased power efficiency, and avoidance of bulk effect. As an example, this technique is applied to attain continuous tuning for two novel voltage-to-current converters, achieving highly linear programmable transconductance over a rail-to-rail input range. Both implementations fabricated in a 0.5-mum CMOS technology using a dual supply of plusmn1.5 V achieve a THD of -60 dB with differential input swings of 6 Vpp (i.e., twice the supply voltage). The area and power consumption are 0.12 mm2 and 2.6 mW for the first implementation and 0.11 mm2 and 2.2 mW for the second one, respectively.

Using Floating Gate and Quasi-Floating Gate Techniques for Rail-to-Rail Tunable CMOS Transconductor Design

A class AB version of the conventional super source follower (SSF) is described. The circuit greatly increases slew rate (SR) and current efficiency, maintaining the low distortion and low output resistance of the SSF. Class AB operation is achieved without extra power dissipation or supply requirements, and without bandwidth or noise degradation. The circuit can advantageously replace the SSF in a wide variety of analog systems, opening a new research line in analog design. To illustrate the widespread application of this cell, a class AB differential unity-gain buffer, a class AB differential current mirror and two class AB differential transconductors are designed, fabricated in a 0.5µm CMOS technology and tested. Measurement results using a dual supply of ±1.65V show that the proposed class AB version of the SSF improves SR by a factor 21.5 and increases bandwidth by 10%, keeping noise level, input range, power consumption, and supply requirements unaltered. The fabricated class AB current mirror features a THD at 100 kHz of − 62dB for signal currents 20 times larger than the bias current. The fabricated transconductors feature an IM3 at 1 MHz of − 56.6dB for output currents more than 13 times larger than the bias currents. Copyright

CMOS Transconductors With Continuous Tuning Using FGMOS Balanced Output Current Scaling

A tunable CMOS Gm-C channel-select low-pass filter is presented. Class AB operation overcomes the dynamic range versus static power tradeoff of conventional channel-select filter topologies. Programmable transconductors are designed using quasi-floating gate transistors, which provide class AB operation without requiring extra supply voltage or power requirements and keeping accurately set quiescent currents. The filter can be applied to channel selection in highly integrated, low power zero-IF wireless receivers. For example, its frequency tuning range and linearity makes it suitable for a dual-mode Bluetooth/ZigBee zero-IF receiver. Measurement results for a test chip prototype in a 0.5 μm standard CMOS process are presented, showing a THD <; -55 dB for an input of 1.2 Vpp, which corresponds to peak currents 300% larger than the bias current.

Power-efficient analog design based on the class AB super source follower

In this paper we discuss an efficient implementation of the Cherry-Hooper amplifier scheme based on a new OTA structure. This is used to design highly linear CMOS amplifiers with programmable and accurate gain and high bandwidth that remains approximately constant with gain adjustment. A fully differential VGA with 30 MHz approximate constant bandwidth and accurate digitally adjustable gain from 1 to 128 in 0.5 mum CMOS technology is discussed. Experimental verification of the proposed scheme is also provided.

Tunable Class AB CMOS Gm-C Filter Based on Quasi-Floating Gate Techniques

A novel CMOS current-feedback operational amplifier (CFOA) aimed to low-power applications is proposed. The use of a compact class AB implementation allows high current-drive capability and simultaneously very low quiescent power consumption. Measurement results of a fabricated prototype show for an inverting configuration a closed-loop bandwidth of 1 MHz independent of gain setting, and a slew rate of 2V/µs for a load capacitance of 30 pF and a quiescent power consumption of 264µW. Copyright

A simple approach for the implementation of CMOS amplifiers with constant bandwidth independent of gain

A novel class AB second-generation CMOS current conveyor (CCII) is presented. Class AB operation is achieved without increasing supply voltage requirements or power consumption. The circuit also features very low input resistance at terminal X. The CCII has been fabricated in a 0.5-µm CMOS technology. Measurement results using a dual supply voltage of ±1.65V show a THD of −60dB at 120 kHz in current follower configuration, for input and output currents 20 times larger than the bias current. The quiescent power of this configuration is 99 µW and the silicon area is 0.02 mm2.

Micropower high current-drive class AB CMOS current-feedback operational amplifier

A class AB tunable transconductor is presented, featuring low quiescent power consumption. Class AB operation is achieved using quasi-floating gate transistors. Highly linear tuning is obtained using resistive dividers implemented by transistors operating in triode region. Simulation results for a low-cost 0.5µm standard CMOS process are presented, validating the proposed approach.

Micropower class AB CMOS current conveyor based on quasi-floating gate techniques

This paper presents a new CMOS transconductor amplifier able to achieve 90dB of SFDR. It is based in the creation of low impedance nodes using local feedback to drive a degeneration resistor. Then, the current generated at the resistor is delivered directly to the output using source coupled pairs. The proposed transconductor does not rely on current mirrors or in cancellation of nonlinear terms, thus improving significantly the linearity and the robustness against mismatch. Simulation results are provided that show THD of 91 dB and an IM3 of 81 dB at 10MHz with 2Vpp differential input-output signal