M. Anis

Low power UWB pulse radio transceiver front-end

In this paper, we propose a low power architecture to extract UWB pulse radio signals from noise level in the presence of narrow band interfering channels. The receiver consists of many narrow band-pass filters, which extract energy either from transmitted UWB signal, interfering channels or noise. Transmitted UWB data can be extracted by statistical correlation of multiple band-pass filter outputs. Super-regenerative receivers, tuned within UWB spectrum, act as band-pass filters. Summer and comparator perform statistical correlation. The test structure of transceiver has been implemented on 0.18 mum CMOS technology, active area of 3.15 mm2, and data exchange rate of 8 Mbits/s with power consumption of 2.6 mw at 1.5 V

Super-regenerative UWB impulse detector with synchronized quenching mechanism

This paper presents low power fully integrated super-regenerative UWB impulse detector with automatic adjustment of incoming pulses at highly sensitive region by using synchronized voltage controlled quenching mechanism. In-band and out-of-band interferences are eliminated by logic comparison and redundancy check between the outputs of multiple super-regenerators tuned within UWB spectrum. The test structure has been implemented on 0.18 mum CMOS technology, active area of 1.4 mm2. The UWB signal to in-band interferer ratio of -36 dB is achieved with sensitivity of -95 dBm at data rate of 20 Mb/s and power consumption of 5 mW at 1.5 V.

Ultra low power RF transceiver architecture for in-body communication system

This paper presents a ultra low power RF transceiver architecture for 402–405MHz medical implant communication system. The differential complementary colpitts super-regenrative oscillator is used in this architecture to achieve low phase noise, high gain and linearity at low power consumption. The external PCB loop antenna is incorporated into the oscillator. This provides a high Q-factor inductive element to achieve high sensitivity and selectivity. The oscillator transmits RF signals in switched OOK mode and receives in super-regenerative mode. The DSSS super-regenerative mode is proposed for multi-user enviornment. The design concept is simulated in 0.18um CMOS technology. The exchange rate upto 120kbps is achieved for detecting −95dBm signals with the power consumption of 400uW.

Fully integrated UWB impulse transmitter and 402-to-405MHz super-regenerative receiver for medical implant devices

This paper proposes a multi-standard transceiver architecture, based on UWB impulse transmitter and 402-to-405MHz super-regenerative receiver for medical implant devices. This architecture eliminates the requirement of frequency synthesizer and power amplifier at transmitter side and LNA, mixers, IF amplifiers and ADCs at receiver side of implant transceiver. The test structure of transceiver has been implemented on 0.18µm CMOS technology. The UWB impulse transmitter consumes 0.3mW from 1.5V supply at the data rate of 500Kbits/s. The 402-to-405MHz super-regenerative receiver consumes 0.5mW at the data rate of 120Kbits/s and sensitivity of −95dBm.

Low power complementary-colpitts self-quenched super-regenerative ultra-wideband (UWB) bandpass filter in CMOS technology

This paper presents the complementary colpitts self-quenched super-regenerative ultra-wideband (UWB) bandpass filter for low power, low cost and medium data rate wireless communication systems. The high gain, large bandwidth and low power consumption are the attractive properties of self-quenched super-regenerative filters for UWB systems. The bandwidth of 1.5GHz across the central frequency of 7.5GHz is measured for complementary colpitts self-quenched super-regenerative filter. The test structure has been implemented on 0.18μm CMOS technology. The data rate of 10Mb/s is achieved for detecting −95dBm signals with power consumption of 1mW at 1.5V.

Low power UWB impulse radio transceiver front-end based on statistical correlation technique

In this paper, we propose low power architecture to extract UWB pulse radio signals from noise level in the presence of narrow band interfering channels based on two dimensional statistical correlation technique. The receiver consists of many narrow band-pass filters, which extract energy either from transmitted UWB signal, interfering channels or noise. Transmitted UWB data can be extracted by statistical correlation of multiple band-pass filter outputs. Super-regenerative receivers, tuned within UWB spectrum, act as band-pass filters. Summer and comparators perform statistical correlation. Synchronization is achieved by clock and data recovery (CDR) circuit. The test structure of transceiver has been implemented on 1.08 mum CMOS technology, active area of 3.15 mm2, and data exchange rate of 8 Mbits/s with power consumption of 3 mw at 1.5 V Index Terms-Low power, ultra-wide band (UWB), super-regenerative receiver, interference mitigation, RF oscillator.

3.1GHz–3.8GHz integrated transmission line super-regeneration amplifier with degenerative quenching technique for impulse-FM-UWB transceiver

This paper presents an integrated transmission line super-regeneration amplifier (SRA) with degenerative quenching technique for short range impulse-FM-UWB transceiver. In transmitting mode, the SRA generates pulsed-sinusoids centered at two different tuned frequencies within 3.1GHz–3.8GHz to distinguish between data bit ‘1’ and ‘0’. In receiving mode, the SRA switches between filtering and oscillating modes with periodic change in the resonant frequency to detect the impulse-FM-UWB data pattern. The Q-enhanced degenerative quenching technique reduces the sensitivity of the negative transconductance (GM) over a wide range of bias currents. This also reduces the direct coupling of the high frequency quenching pattern to the resonator and the negative GM stage. The capacitively loaded integrated transmission line reduces the phase noise in transmit and receive modes. A test structure of the amplifier has been implemented in 0.25um BiCMOS technology. The SRA consumes 1.2mA and 1.8mA from a 2.5V supply in transmit and receive mode for a data rate of 10Mb/s and a sensitivity of −90dBm.

Fully integrated self-quenched super-regenerative UWB impulse detector

This paper presents the fully integrated self-quenched super-regenerative UWB impulse detector for low power and medium data rate wireless applications. The high gain, large bandwidth and low power consumption are the attractive properties of self-quenched super regenerative receivers for UWB system. The bandwidth of 1.5GHz across the central frequency of 7GHz is measured for self-quenched super-regenerative receiver. The test structure has been implemented on 0.18mum CMOS technology. The data rate of 4MHz is achieved for detecting -95dBm signals with power consumption of 1mW at 1.5V.

3.1-to-7GHz UWB impulse radio transceiver front-end based on statistical correlation technique

This paper presents the UWB impulse radio transceiver front-end based on statistical correlation technique between multiple band-pass filters tuned within UWB spectrum. The band-pass filters can detect energy either from transmitted UWB impulses, interfering channels or noise. Transmitted UWB impulses can be extracted by statistical correlation in between the outputs of band-pass filters. Super-regenerative receivers, tuned within 3.1-to-7 GHz UWB spectrum, act as band-pass filters. Summer and comparator perform statistical correlation. The test structure of transceiver has been implemented on 0.18 mum CMOS technology, active area of 1.44 mm2, sensitivity of -99 dBm and -30 dB SIR with power consumption of 15 mW at 1.5 V.

A 400uW 10Mbits/s CMOS UWB impulse radio transmitter for wireless sensor networks

This paper presents fully integrated CMOS single band UWB impulse radio transmitter for low power and medium data rate wireless sensor network. The pseudo random pattern of UWB impulses are generated during switch on-time of on-off keying modulation. The UWB pulse generator is based on combination of multiple pulses to achieve chirped UWB impulse of nearly flat UWB spectrum. The test structure was implemented in 0.18 um CMOS process. It consumes 400 uW at 10 Mbits/s data rate of on-off keying modulated data pattern.