M. Ťapajna
Slovak Academy of Sciences
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Featured researches published by M. Ťapajna.
Applied Physics Letters | 2007
Gianmauro Pozzovivo; J. Kuzmik; S. Golka; W. Schrenk; G. Strasser; D. Pogany; K. Čičo; M. Ťapajna; K. Fröhlich; J.-F. Carlin; M. Gonschorek; E. Feltin; N. Grandjean
The authors investigate 2μm gate-length InAlN∕GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS HEMTs) with 12nm thick Al2O3 gate insulation. Compared to the Schottky barrier (SB) HEMT with similar design, the MOS HEMT exhibits a gate leakage reduction by six to ten orders of magnitude. A maximal drain current density (IDS=0.9A∕mm) and an extrinsic transconductance (gme=115mS∕mm) of the MOS HEMT also show improvements despite the threshold voltage shift. An analytical modeling shows that a higher mobility of electrons in the channel of the MOS HEMT and consequently a higher number of electrons attaining the velocity saturation may explain the observed increase in gme after the gate insulation.
Electrochemical and Solid State Letters | 2008
K. Fröhlich; M. Ťapajna; A. Rosová; E. Dobročka; K. Hušeková; Jaan Aarik; A. Aidla
Titanium dioxide thin films were grown on RuO 2 layers by atomic layer deposition. The stabilizing effect of the bottom rutile-type RuO 2 layer resulted in growth of the TiO 2 rutile films at temperatures above 275°C. Stabilization of the TiO 2 rutile phase occurred due to local epitaxial growth of the polycrystalline RUO 2 /TiO 2 /RUO 2 structure, as revealed by transmission electron microscopy. A dielectric constant as high as 155 and equivalent oxide thickness (EOT) as low as 0.5 nm were determined from the capacitance-voltage measurements for the TiO 2 films grown above 275°C. A leakage current density of 10 -3 A/cm 2 at 1 V bias voltage was obtained for the films with EOT equal to 0.5 nm.
Applied Physics Letters | 2015
M. Ťapajna; Oliver Hilt; Eldad Bahat-Treidel; Joachim Würfl; J. Kuzmik
Gate diode conduction mechanisms were analyzed in normally-off p-GaN/AlGaN/GaN high-electron mobility transistors grown on Si wafers before and after forward bias stresses. Electrical characterization of the gate diodes indicates forward current to be limited by channel electrons injected through the AlGaN/p-GaN triangular barrier promoted by traps. On the other hand, reverse current was found to be consistent with carrier generation-recombination processes in the AlGaN layer. Soft breakdown observed after ∼105 s during forward bias stress at gate voltage of 7 V was attributed to formation of conductive channel in p-GaN/AlGaN gate stack via trap generation and percolation mechanism, likely due to coexistence of high electric field and high forward current density. Possible enhancement of localized conductive channels originating from spatial inhomogeneities is proposed to be responsible for the degradation.
Journal of Applied Physics | 2014
M. Ťapajna; Michal Jurkovič; L. Valik; Š. Haščík; D. Gregušová; Frank Brunner; E.-M. Cho; Tamotsu Hashizume; J. Kuzmik
Oxide/semiconductor interface trap density (Dit) and net charge of Al2O3/(GaN)/AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor (MOS-HEMT) structures with and without GaN cap were comparatively analyzed using comprehensive capacitance measurements and simulations. Dit distribution was determined in full band gap of the barrier using combination of three complementary capacitance techniques. A remarkably higher Dit (∼5–8 × 1012 eV−1 cm−2) was found at trap energies ranging from EC-0.5 to 1 eV for structure with GaN cap compared to that (Dit ∼ 2–3 × 1012 eV−1 cm−2) where the GaN cap was selectively etched away. Dit distributions were then used for simulation of capacitance-voltage characteristics. A good agreement between experimental and simulated capacitance-voltage characteristics affected by interface traps suggests (i) that very high Dit (>1013 eV−1 cm−2) close to the barrier conduction band edge hampers accumulation of free electron in the barrier layer and (ii) the higher Dit cen...
Applied Physics Letters | 2013
M. Ťapajna; M. Jurkovič; L. Válik; Š. Haščík; D. Gregušová; Frank Brunner; E.-M. Cho; J. Kuzmik
The trapping phenomena in GaN metal-oxide-semiconductor high-electron mobility transistor structures with 10 and 20-nm thick Al2O3 gate dielectric grown by metal-organic chemical vapor deposition were deeply investigated using comprehensive capacitance-voltage measurements. By controlling the interface traps population, substantial electron trapping in the dielectric bulk was identified. Separation between the trapping process and the interface traps emission allowed us to determine distribution of interface trap density in a wide energy range. Temperature dependence of the trapping process indicates thermionic field emission of electrons from the gate into traps with a sheet density of ∼1013 cm−2, located a few nm below the gate.
Applied Physics Letters | 2014
D. Gregušová; M. Jurkovič; Š. Haščík; Michal Blaho; A. Seifertová; J. Fedor; M. Ťapajna; K. Fröhlich; P. Vogrinčič; J. Liday; J. Derluyn; M. Germain; J. Kuzmik
We discuss possibilities of adjustment of a threshold voltage VT in normally off GaN high-electron mobility transistors (HEMTs) without compromising a maximal drain current IDSmax. Techniques of a low power plasma or thermal oxidation of 2-nm thick AlN cap over 3-nm thick AlGaN barrier are developed and calibrated for a thorough oxidation of the cap with a minimal density of surface donors at the inherent oxide-semiconductor interface. It has been shown that while a thermal oxidation technique leads to the channel and/or interface degradation, low density of surface donors and scalability of VT with additionally overgrown Al2O3 may be obtained for plasma oxidized HEMTs. With 10-nm thick Al2O3 deposited at 100 °C by atomic-layer deposition, we obtained VT of 1.6 V and IDSmax of 0.48 A/mm at a gate voltage of VGS = 8 V. Density of surface donors was estimated to be about 1.2 × 1013 cm−2, leaving most of the negative polarization charge at the semiconductor surface uncompensated. Further reduction of surface...
Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena | 2011
K. Čičo; K. Hušeková; M. Ťapajna; D. Gregušová; R. Stoklas; J. Kuzmik; J.-F. Carlin; N. Grandjean; D. Pogany; K. Fröhlich
The authors report on preparation and electrical characterization of InAlN/AlN/GaN metal-oxide-semiconductor (MOS) high electron mobility transistors (HEMTs) with Al2O3, ZrO2, and GdScO3 gate dielectrics. About 10 nm thick high-κ dielectrics were deposited by metal organic chemical vapor deposition after the Ohmic contact processing. Application of the gate dielectrics for 2 μm gate length MOS HEMTs leads to gate leakage current reduction from four to six orders of magnitude compared with Schottky barrier HEMTs. Among others, MOS HEMTs with an Al2O3 gate dielectric shows the highest transconductance (∼150 mS/mm) and maximum drain current (∼0.77 A/mm) and the lowest sheet resistance of ∼260 Ω/◻. MOS HEMTs with GdScO3 shows the highest breakdown electric field of about 7.0 MV/cm. A deep level transient spectroscopy (DLTS) based analysis revealed the maximum interface state density Dit up to 4×1012, 9×1012, and 3×1013 eV−1 cm−2 for Al2O3, ZrO2, and GdScO3/InAlN interface, respectively.
Japanese Journal of Applied Physics | 2013
M. Ťapajna; J. Kuzmik
The effect of defect charges on a threshold voltage (Vth) of the GaN/AlGaN/GaN metal–oxide–semiconductor heterostructures (MOS-Hs) with the gate stack thickness scaling was investigated by using capacitance–voltage measurements and a comprehensive analytical model [M. Ťapajna and J. Kuzmik: Appl. Phys. Lett. 100 (2012) 113509]. Using the MOS-Hs with Al2O3 and HfO2 dielectrics grown by plasma-enhanced atomic layer deposition, a high density (~1013 cm-2) of negative fixed oxide charge (Nox) was extracted for Al2O3 layers, while an order of magnitude lower density (~1012 cm-2) of positive Nox was extracted for HfO2 films. Consequently, despite similar dielectric constant of Al2O3 to that of (Al)GaN, it is advisable to attain normally-off operation by scaling the AlGaN layer thickness rather than the oxide thickness, taking advantage of the negative Nox offsetting Vth towards the positive voltages. Scaling of the AlGaN layer thickness is found to be effective also in the case of HfO2 dielectric, however, due to a positive Nox in HfO2, AlGaN layer needs to be scaled to a similar thickness (e.g., ~3 nm) to obtain a positive Vth for the same oxide thickness of HfO2 and Al2O3 (~5 nm). On the other hand, scaling of the GaN cap has no effect on Vth. Further, our analysis suggests that for MOS-Hs with both Al2O3 and HfO2 gate dielectric, the Fermi level position at the oxide/barrier interface in equilibrium is located within donor-like interface traps. Therefore, the oxide/GaN cap interface trap charge in MOS-Hs with the given structure parameters should lead to a negative Vth shift.
IEEE Transactions on Electron Devices | 2014
J. Kuzmik; M. Ťapajna; L. Valik; Marian Molnar; Daniel Donoval; Clément Fleury; D. Pogany; G. Strasser; Oliver Hilt; Frank Brunner; Joachim Würfl
DC and transient self-heating effects are investigated in normally off AlGaN/GaN transistors designed for a high-power operation. Electrical and optical methods are combined with thermal simulations; 2-μs-long voltage pulses dissipating about 4.5 W/mm are applied on four different transistor structures combining GaN or AlGaN buffer on an n-type SiC substrate with or without Ar implantation. Transistors with only 5% Al mass fraction in the buffer show almost a threefold increase in the transient self-heating if compared with devices on the GaN buffer. On the other hand, 2-μs-long pulses were found not to be long enough for the Ar-implanted SiC substrate to influence the device self-heating unless AlGaN composition changes. In the dc mode, however, both the buffer composition and Ar implantation significantly influence the self-heating effect with the highest temperature rise for the transistor having the AlGaN buffer grown on the Ar-implanted SiC. We point on possible tradeoffs between the transistor high-power design and the device thermal resistance.
Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena | 2017
M. Ťapajna; L. Valik; F. Gucmann; D. Gregušová; K. Fröhlich; Š. Haščík; E. Dobročka; L. Tóth; B. Pécz; J. Kuzmik
The oxide/semiconductor interface state density (Dit) in Al2O3/AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor (MOS-HEMT) structures with gate oxides grown by atomic layer deposition at low deposition temperature is analyzed in this work. MOS-HEMT structures with Al2O3 gate oxide were deposited at 100 and 300 °C using trimethylaluminum precursor and H2O and O3 oxidation agents. The structures were found to show negative net charge at oxide/barrier interface with density (Nint) of 1013 cm−2, which was attributed to the reduction of barrier surface donor density (NDS). Dit was determined using capacitance transient techniques, and the results were assessed by the simulations of the capacitance–voltage characteristics affected by interface traps. The results indicate a lower interface quality of the sample with Al2O3 grown using O3 agent compared to those with H2O, even though the former provided lowest gate leakage among the analyzed structures. Moreover, to uncover the NDS nature, Dit...