M. Wiśniewska

Exact cover of states in the discrete state-space system

Given the discrete state-space system, the set cover problem is defined as selection of the minimal number of global states to cover all the local states. Commonly known methods base on the matrix reduction, boolean function transformation or heuristics ideas. Most of them are inefficient because of computational/memory complexity or non-optimal results. We propose an application of xt-hypergraphs to compute the solution in case where the discrete system can be represented by an xt-hypergraph. Recognition, as well as computation of exact cover in case of xt-hypergraphs is bounded by a polynomial in the number of local states. Therefore, the whole cover process problem turns out to be polynomial.

Effective Partial Reconfiguration of Logic Controllers Implemented in FPGA Devices

A method of partial reconfiguration of logic controllers implemented in FPGA is presented in the chapter. Only the control memory content is replaced while the rest of the system is not modified. The logic synthesis and implementation are performed only once. Therefore, such a realisation highly accelerates the whole prototyping process. The performed experiments showed that the original bit-stream that is sent to the FPGA can be reduced even over 500 times.

Design and verification of distributed logic controllers with application of Petri nets

The paper deals with the designing and verification of distributed logic controllers. The control system is initially modelled with Petri nets and formally verified against structural and behavioral properties with the application of the temporal logic and model checking technique. After that it is decomposed into separate sequential automata that are working concurrently. Each of them is re-verified and if the validation is successful, the system can be finally implemented.