Ma Zhuo

A fast transient response low dropout regulator with current control methodology

A transient performance optimized CCL-LDO regulator is proposed. In the CCL-LDO, the control method of the charge pump phase-locked loop is adopted. A current control loop has the feedback signal and reference current to be compared, and then a loop filter generates the gate voltage of the power MOSFET by integrating the error current. The CCL-LDO has the optimized damping coefficient and natural resonant frequency, while its output voltage can be sub-1-V and is not restricted by the reference voltage. With a 1 μF decoupling capacitor, the experimental results based on a 0.13 μm CMOS process show that the output voltage is 1.0 V; when the workload changes from 100 μA to 100 mA transiently, the stable dropout is 4.25 mV, the settling time is 8.2 μs and the undershoot is 5.11 mV; when the workload changes from 100 mA to 100 μA transiently, the stable dropout is 4.25 mV, the settling time is 23.3 μs and the overshoot is 6.21 mV. The PSRR value is more than −95 dB. Most of the attributes of the CCL-LDO are improved rapidly with a FOM value of 0.0097.

A noise rejective VCO with build-in active LC filter

VCO is the key component in PLLs, and is easy to be interfered by the noise on control voltage or power supply. In this article, a build-in LC filter is inserted into a single-end VCO which is named BF-VCO. The LC filter consists of a regulated cascode active inductor and a capacitor. And the low-pass bandwidth is not greater than 1.6MHz. The measurement spectrum shows that the noise received by the succeeding ring oscillator is attenuated for about 20dB, while the white noise floor changes little.

A curvature calibrated bandgap reference with base—emitter current compensating in a 0.13 μm CMOS process

In bandgap references, the effect caused by the input offset of the operational amplifier can be effectively reduced by the utilization of cascade bipolar junction transistors (BJTs). But in modern CMOS logic processes, due to the small value of β, the base—emitter path of BJTs has a significant streaming effect on the collector current, which leads to a large temperature drift for the reference voltage. To solve this problem, a base—emitter current compensating technique is proposed in a cascade BJT bandgap reference structure to calibrate the curvature of the output voltage to temperature. Experimental results based on the 0.13 μm logic CMOS process show that the reference voltage is 1.238 V and the temperature coefficient is 6.2 ppm/°C within the range of −40 to 125 °C.