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Dive into the research topics where Manish Chandhok is active.

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Featured researches published by Manish Chandhok.


Journal of Vacuum Science & Technology B | 2008

Improvement in linewidth roughness by postprocessing

Manish Chandhok; Kent Frasure; E. Steve Putna; Todd R. Younkin; Uday Shah; Wang Yueh

In order to meet the linewidth roughness (LWR) requirements for the 16nm node, postprocessing methods need to be investigated to reduce the LWR after the lithography step. We present the results of five different techniques applied to a single extreme ultraviolet photoresist. The results show that rinse has the most promise in achieving the nearly two time LWR improvement needed. However, other techniques such as etch/trim, hardbake, vapor smoothing, and ozonation give at least 10%–20% LWR reduction and could be further optimized. Some of the physical based techniques which melt the photoresist reduce the midspatial frequency (50–10nm period) roughness, whereas chemical based techniques reduce the low order spatial frequencies (∼500–50nm period). Hence, a combination of techniques may be the ultimate solution.


Journal of Vacuum Science & Technology B | 2004

Effects of flare in extreme ultraviolet lithography: Learning from the engineering test standa)

Manish Chandhok; Sang H. Lee; Terence Bacuita

One of the technical challenges for introducing extreme ultraviolet lithography (13.5 nm) into high volume manufacturing is flare. Flare reduces aerial image contrast and creates critical dimension (CD) variations across the die due to local chrome density dependent flare variations. Therefore, it is important to experimentally characterize flare on a full-field stepper and develop methods to mitigate and compensate for its effects. In this article, the impact of flare on depth of focus and exposure latitude are experimentally quantified using the engineering test stand. In addition, we report a marked increase in line width roughness due to high levels of flare in the optical system. A technique for the extraction of the point spread function due to scatter using density dependent CD data has been demonstrated for more accurate flare variation compensation.


Emerging Lithographic Technologies VII | 2003

Implementing flare compensation for EUV masks through localized mask CD resizing

Christof G. Krautschik; Manish Chandhok; Guojing Zhang; Sang Hun Lee; Michael Goldstein; Eric M. Panning; Bryan J. Rice; Robert Bristol; Vivek Singh

Early production EUV exposure tools may have difficulty achieving flare requirements in the 5-6% range for the 32nm technology node. In this case, flare compensation may be needed to achieve the necessary CD control budget for production. This paper explores both experimentally as well as computationally wafer CD compensation though mask CD resizing so that proper CD control across the exposure field can be maintained. Experimental resist data collected on POB#2 of the Engineering Test Stand (ETS) suggest that even a simple linear CD compensation model can signifantly improve CD contorl in the presence of flare variation. Extending a similar concpet to a hypothetical full-field 25×33 mm2 mask area containgin 20 nm gate CDs shwos taht CD compensation, while computationally demanding, can be realized through a convolution approach of a 1×1 mm2 mask area using a non-uniform adaptive grid.


Proceedings of SPIE | 2007

EUV lithography program at IMEC

Anne Marie Goethals; Rik Jonckheere; Gian F. Lorusso; Jan Hermans; Frieda Van Roey; Alan Myers; Manish Chandhok; Insung Kim; Ardavan Niroomand; Fumio Iwamoto; Nikolay Stepanenko; Roel Gronheid; Bart Baudemprez; Kurt G. Ronse

IMEC has started an EUV lithography research program based on ASMLs EUV full field scanner, the Alpha Demo Tool (ADT). Currently, the ADT is in the final phase of installation. The program focuses on three main projects: EUV resists, EUV reticles and assessment of the ADT performance. The intent of this program is to help improve and establish the necessary mask and resist infrastructure. In this paper, the status and the progress of the program is reviewed. In preparation for a resist process for the ADT, interference lithography has been used to track the progress of resist performance. Steady progress in resist development is seen, especially in terms of resolution, as some materials are now able to resolve 25nm HP. In its initial phase, the reticle project has concentrated on working with the mask and blank suppliers to assure timely availability of reticles for the ADT. An overview is given of the other reticle related activities, as well as first results of a defect printability study by simulation. In the ADT assessment project, simulation studies are reported aimed at the development of optical correction for flare and reticle shadowing effects. The impact of flare and shadowing effects are well understood and strategies for flare mitigation and shadowing effect correction are proposed.


Journal of Vacuum Science & Technology B | 2006

Absorbance measurement of polymers at extreme ultraviolet wavelength: Correlation between experimental and theoretical calculations

Young-Je Kwark; J. Pablo Bravo-Vasquez; Manish Chandhok; Heidi Cao; Hai Deng; Eric M. Gullikson; Christopher K. Ober

Performance requirements for extreme UV (EUV) resists will require the development of polymer platforms. A challenge in designing photoresists for EUV wavelengths is the selection of molecular structures that have minimal absorbance. For example, elements that are commonly used in photoresists at other wavelengths, such as oxygen and fluorine, are highly absorbing at ∼13nm making them problematic for EUV applications. In order to provide a tool for EUV resist design, this article presents a study of the absorbance of common photoresist structures and compares it to theoretical estimates of resist absorbance based on composition and density. On this basis, several potential structures suitable for EUV resists are assessed.


Emerging Lithographic Technologies IX | 2005

One small step: world's first integrated EUVL process line

Jeanette M. Roberts; Terence Bacuita; Robert Bristol; Heidi B. Cao; Manish Chandhok; Sang H. Lee; Eric M. Panning; Melissa Shell; Guojing Zhang; Bryan J. Rice

The Intel lithography roadmap calls for Extreme Ultraviolet Lithography (EUVL) to be used for the 32 nm node. With the installation of the EUV Micro-Exposure Tool (MET) complete, Intel now has the worlds first integrated EUVL process line including the first commercial EUV exposure tool. This process line will be used to develop the EUV technology, including mask and resist, and to investigate issues such as defect printability. It also provides a test-bed to discover and resolve problems associated with using this novel technology in a fab (not lab) environment. Over 22,000 fields have been exposed, the discharge-produced plasma light source has operated for 50,000,000 pulses, 8 masks have been fabricated, and 8 resists have been characterized. The MET combines high resolution capability with Intels advanced processing facilities to prepare EUVL for high-volume manufacturing (HVM). In this paper we review the MET installation and facilities, novel capabilities of the linked track, data on optics quality and modeled tool capability, and the MET mask fabrication process. We present data on tool performance including printing 45 nm 1/2 pitch lines with 160 nm depth of focus and 27 nm isolated lines. We show tool accuracy and repeatability data, and discuss issues uncovered during installation and use.


Emerging Lithographic Technologies VIII | 2004

Determination of the flare specification and methods to meet the CD control requirements for the 32-nm node using EUVL

Manish Chandhok; Sang H. Lee; Christof G. Krautschik; Bryan J. Rice; Eric M. Panning; Michael Goldstein; Melissa Shell

The minimum gate CD for the 32 nm node is 15 nm and the CD control requirement on the gate CD is < 2.5 nm 3σ. One of the major concerns for meeting these targets using EUV lithography is flare. Flare degrades the aerial image contrast which decreases the process window, and within-die chrome density variation results in local flare variation which worsens the CD control. Since mirror roughness contributes to flare, mirror polishing needs to be improved so that the Mid Spatial Frequency Roughness (MSFR) will be reduced to < 0.14 nm/mirror for 6 mirror imaging systems. In this paper, we will determine the minimum acceptable flare for the 32 nm node to meet the CD target and control requirements using modeling and present methods to meet them as demonstrated by experiments run on the Engineering Test Stand (ETS). Effectiveness of flare mitigation methods using chrome dummification and negative tone resists are quantified, and the capability of Flare Variation Compensation (FVC) to meet CD control targets are verified experimentally.


ACS Nano | 2012

Kinetic rates of thermal transformations and diffusion in polymer systems measured during sub-millisecond laser-induced heating.

Byungki Jung; Jing Sha; Florencia Paredes; Manish Chandhok; Todd R. Younkin; Ulrich Wiesner; Christopher K. Ober; Michael O. Thompson

Probing chemical reaction kinetics in the near-solid state (small molecules and polymers) is extremely challenging because of the restricted mobility of reactant species, the absence of suitable analytical probes, and most critically the limited temperature stability of the materials. By limiting temperature exposure to extremely short time frames (sub-millisecond), temperatures in excess of 800 °C can be accessed extending kinetic rate measurements many orders of magnitude. Here we demonstrate measurements on a model system, exploiting the advantages of thin-films, laser heating, and chemically amplified resists as an exquisite probe of chemical kinetic rates. Chemical reaction and acid diffusion rates were measured over 10 orders of magnitude, exposing unexpected and large changes in dynamics linked to critical mechanism shifts across temperature regimes. This new approach to the study of kinetics in near-solid state materials promises to substantially improve our understanding of processes active in a broad range of temperature-sensitive, low-mobility materials.


Emerging Lithographic Technologies VII | 2003

Lithographic flare measurements of EUV full-field projection optics

Sang Hun Lee; Patrick P. Naulleau; Christof G. Krautschik; Manish Chandhok; Henry N. Chapman; Donna J. O'Connell; Michael Goldstein

We demonstrate direct flare measurements of 4-mirror projection optics in the Engineering Test Stand (ETS) using a conventional resist clearing method (the Kirk method). Two extreme UV lithographic projection optics, one with higher flare than the other, have been characterized and the results compared. The measured results have also been compared to analytical calculations based on measured mirror roughness and the extended point spread function. Full-field flare across the 24 mm field width has been measured, and we have verified that flare is constant across the field for EUV lithography as predicted. Horizontal (H) and vertical (V) flare bias has been observed and the cause of the H-V flare bias has been investigated. The main cause has been identified to be anisotropic mirror polishing. Simulations with the 2D Power Spectral density function have confirmed the experimental results.


Proceedings of SPIE | 2010

EUV lithography for 22nm half pitch and beyond: exploring resolution, LWR, and sensitivity tradeoffs

E. Steve Putna; Todd R. Younkin; Roman Caudillo; Manish Chandhok

The International Technology Roadmap for Semiconductors (ITRS) denotes Extreme Ultraviolet (EUV) lithography as a leading technology option for realizing the 22nm half pitch node and beyond. According to recent assessments made at the 2010 EUVL Symposium, the readiness of EUV materials remains one of the top risk items for EUV adoption. The main development issue regarding EUV resists has been how to simultaneously achieve high resolution, high sensitivity, and low line width roughness (LWR). This paper describes our strategy, the current status of EUV materials, and the integrated post-development LWR reduction efforts made at Intel Corporation. Data collected utilizing Intels Micro- Exposure Tool (MET) is presented in order to examine the feasibility of establishing a resist process that simultaneously exhibits ≤22nm half-pitch (HP) L/S resolution at ≤11.3mJ/cm2 with ≤3nm LWR.

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