Maojun Wang

High-Performance Normally-Off

This letter reports a normally-OFF Al₂O₃/GaN gate-recessed MOSFET using a low-damage digital recess technique featuring multiple cycles of plasma oxidation and wet oxide removal process. The wet etching process eliminates the damage induced by plasma bombardment induced in conventional inductively coupled plasma dry etching process so that good surface morphology and high interface quality could be achieved. The fully recessed Al₂O₃/GaN MOSFET delivers true enhancement-mode operation with a threshold voltage of +1.7 V. The maximum output current density is 528 mA/mm at a positive gate bias of 8 V. A peak field-effect mobility of 251 cm²/V·s is obtained, indicating high-quality Al₂O₃/GaN interface.

{\rm Al}_{2}{\rm O}_{3}/{\rm GaN}

We report a high-performance normally-off Al2O3/AlN/GaN MOS-channel-high electron mobility transistor (MOSC-HEMT) featuring a monocrystalline AlN interfacial layer inserted between the amorphous Al2O3 gate dielectric and the GaN channel. The AlN interfacial layer effectively blocks oxygen from the GaN surface and prevents the formation of detrimental Ga-O bonds. Frequency-dispersion in C-V characteristics and threshold voltage hysteresis are effectively suppressed, owing to improved interface quality. The new MOSC-HEMTs exhibit a maximum drain current of 660 mA/mm, a field-effect mobility of 165 cm2/V·s, a high on/off drain current ratio of ~1010, and low dynamic on-resistance degradation.

MOSFET Using a Wet Etching-Based Gate Recess Technique

Kink effects are studied in conventional AlGaN/GaN high-electron-mobility transistors by measuring their current-voltage characteristics with various bias sweeping conditions at drain and gate terminals. It is found that the kink effect is induced by drain and gate pumping. The magnitude of kink is directly related to the maximum drain voltage and current levels during on-state operation. The hot electrons in the 2-D electron gas channel generated under high drain bias could be injected into the adjacent epitaxial buffer layer where they can be captured by donor-like traps. Hot electron trapping and the subsequent field-assisted de-trapping is suggested to be the dominant mechanism of kink generation in the studied device. The extracted activation energy of the traps accounting for the kink effect is 589 ± 67 meV from temperature-dependent transient measurement, and is close to the energy of the E2 trap widely reported in GaN layers.

Al 2 O 3 /AlN/GaN MOS-Channel-HEMTs With an AlN Interfacial Layer

A self-terminating gate recess etching technique is first proposed to fabricate normally off AlGaN/GaN MOSFET. The gate recess process includes a thermal oxidation of the AlGaN barrier layer for 40 min at 615°C followed by 45-min etching in potassium hydroxide solution at 70°C, which is found to be self-terminated at the AlGaN/GaN interface with negligible effect on the underlying GaN layer, manifesting itself easy to control, highly repeatable, and promising for industrialization. The fabricated device based on this technique with atomic layer deposition Al2O3 as gate insulator exhibits a threshold voltage as high as 3.2 V with a maximum drain current over 200 mA/mm and a 60% increased breakdown voltage than that of the conventional high electron mobility transistors.

Kink Effect in AlGaN/GaN HEMTs Induced by Drain and Gate Pumping

In this paper, we report the device performance of a high-voltage normally off Al₂O₃/GaN MOSFET on the Si substrate. Normally off operation is obtained by multiple cycles of O₂ plasma oxidation and wet oxide-removal gate recess process. The recessed normally off GaN MOSFET with 3 μm gate-drain distance exhibits a maximum drain current of 585 mA/mm at 9 V gate bias. The threshold voltage of the MOSFET is 2.8 V with a standard derivation of 0.2 V on the sample with an area of 2 × 2 cm². The gate leakage current is below 10^-6 mA/mm during the whole gate swing up to 9 V and the ION/IOFF ratio is larger than 109, indicating the good quality of Al₂O₃ gate insulator. The MOSFET with 10 μm gate-drain distance shows a three terminal OFF-state breakdown voltage (BV) of 967 V at zero gate-source bias with a drain leakage current criterion of 1 μA/mm. The specific ON-resistance (R_ON,SP) of the device is 1.6 mQ · cm² and the power figure of merit (BV²/R_ON,SP) is 584 MW/cm².

Fabrication of Normally Off AlGaN/GaN MOSFET Using a Self-Terminating Gate Recess Etching Technique

Current transport mechanism in Au∕Ni∕GaN Schottky diodes has been investigated using current-voltage characterization technique between 27 and 350°C. It is found that the ideality factor n of the diode decreases with increasing temperature when the temperature is lower than 230°C, and then increases with increasing temperature when the temperature is higher than 230°C. The corresponding Schottky barrier height (SBH) increases all through the temperature range. Thermionic-emission model with a Gaussian distribution of SBHs is thought to be responsible for the electrical behavior at temperatures lower than 230°C, while the generation-recombination (GR) process takes place in at temperatures above 230°C. The effective Richardson constant is determined to be 24.08Acm−2K−2, in excellent agreement with the theoretical value. The extrapolated activation energy of the GR process is determined to be 1.157eV. Based on the cathodoluminescence measurements, it is suggested that the deep level defects inducing yellow ...

900 V/1.6

We report the interface characterization of Al2O3/AlN/GaN MOS (metal-oxide-semiconductor) structures with an AlN interfacial layer. A thin monocrystal-like interfacial layer (AlN) is formed at the Al2O3/GaN to effectively block oxygen from the GaN surface and prevent the formation of detrimental Ga-O bonds. The suppression of Ga-O bonds is validated by X-ray photoelectron spectroscopy of the critical interface. Frequency-dispersion in C-V characteristics has been significantly reduced, owing to improved interface quality. Furthermore, using the conventional conductance method suitable for extracting the interface trap density Dit in MOS structures, Dit in the device with AlN was determined to be in the range of 1011–1012 eV−1 cm−2, showing one order of magnitude lower than that without AlN. Border traps near the gate-dielectric/GaN interface were identified and shown to be suppressed by the AlN interfacial layer as well.

{\rm m}\Omega\cdot{\rm cm}^{2}

We provide an overview on the underlying physical mechanisms associated with the fluorine plasma ion implantation technology that provides a robust approach to fabricating GaN normally-off transistors. The discussion is based on atomistic modeling and a series of experimental studies including thermal diffusion, positron annihilation spectroscopy, photoconductivity and electroluminescence.

Normally Off

Improvement of the AlGaN/GaN high-electron mobility transistors (HEMTs) off -state breakdown voltage is achieved by implanting 19F+ ions at an energy of 50 keV and dose of 1 × 1012 cm-2 under the gate region using BF3 as the source. The charge state of the implanted fluorine ions changes from positive to negative in the AlGaN/GaN structure because of fluorines strong electronegativity. The negative-charged fluorine ions at the back side of the two-dimensional electron gas can raise the energy barrier of the GaN buffer layer under the channel, effectively blocking the current injected from the source to the high-field region of the GaN channel when the HEMT is biased at off-state. The source-injected electrons, if not blocked, could flow to the high-field region and initiate a premature three-terminal off-state breakdown in a conventional AlGaN/GaN HEMT. A 38% improvement of the three-terminal off-state breakdown voltage and 40% improvement of the power figure-of-merit VBD-off2/Ron are achieved in the enhanced back barrier HEMT.

{\rm Al}_{2}{\rm O}_{3}/{\rm GaN}

By employing a single AlGaN layer with low Al composition, high quality and uniformity AlGaN/GaN heterostructures have been successfully grown on Si substrates by metal-organic chemical vapor deposition (MOCVD). The heterostructures exhibit a high electron mobility of 2150 cm2/Vs with an electron density of 9.3 × 1012 cm−2. The sheet resistance is 313 ± 4 Ω/◻ with ±1.3% variation. The high uniformity is attributed to the reduced wafer bow resulting from the balance of the compressive stress induced and consumed during the growth, and the thermal tensile stress induced during the cooling down process. By a combination of theoretical calculations and in situ wafer curvature measurements, we find that the compressive stress consumed by the dislocation relaxation (~1.2 GPa) is comparable to the value of the thermal tensile stress (~1.4 GPa) and we should pay more attention to it during growth of GaN on Si substrates. Our results demonstrate a promising approach to simplifying the growth processes of GaN-on-Si to reduce the wafer bow and lower the cost while maintaining high material quality.