Wengang Wu

High-Performance Normally-Off

This letter reports a normally-OFF Al₂O₃/GaN gate-recessed MOSFET using a low-damage digital recess technique featuring multiple cycles of plasma oxidation and wet oxide removal process. The wet etching process eliminates the damage induced by plasma bombardment induced in conventional inductively coupled plasma dry etching process so that good surface morphology and high interface quality could be achieved. The fully recessed Al₂O₃/GaN MOSFET delivers true enhancement-mode operation with a threshold voltage of +1.7 V. The maximum output current density is 528 mA/mm at a positive gate bias of 8 V. A peak field-effect mobility of 251 cm²/V·s is obtained, indicating high-quality Al₂O₃/GaN interface.

{\rm Al}_{2}{\rm O}_{3}/{\rm GaN}

A novel surface-enhanced Raman scattering (SERS) sensor is developed for real-time and highly repeatable detection of trace chemical and biological indicators. The sensor consists of a polydimethylsiloxane (PDMS) microchannel cap and a nanopillar forest-based open SERS-active substrate. The nanopillar forests are fabricated based on a new oxygen-plasma-stripping-of-photoresist technique. The enhancement factor (EF) of the SERS-active substrate reaches 6.06 × 10(6) , and the EF of the SERS sensor is about 4 times lower due to the influence of the PDMS cap. However, the sensor shows much higher measurement repeatability than the open substrate, and it reduces the sample preparation time from several hours to a few minutes, which makes the device more reliable and facile for trace chemical and biological analysis.

MOSFET Using a Wet Etching-Based Gate Recess Technique

We present a frequency-independent compact model for silicon on-chip spiral inductors with an asymmetric double-pi equivalent circuit incorporating high-order parasitics such as skin effect and proximity effect. A set of partition factors for parameter ratios between the input and output segments has been introduced and derived from physical analysis to characterize the non-symmetrical feature of the inductor. A novel approach to extracting the model parameters is also developed based on measured S-parameters. As demonstrated for a series of inductors with different geometries fabricated by 0.18-mum CMOS process, the partition factors derived from the physical model are consistent with the extracted parameters, and the model can simulate precisely the inductor characteristics including the asymmetric admittances over a wide frequency rang beyond the self-resonant frequency without fitting parameters

Microfluidic Surface-Enhanced Raman Scattering Sensors Based on Nanopillar Forests Realized by an Oxygen-Plasma-Stripping-of-Photoresist Technique

A self-terminating gate recess etching technique is first proposed to fabricate normally off AlGaN/GaN MOSFET. The gate recess process includes a thermal oxidation of the AlGaN barrier layer for 40 min at 615°C followed by 45-min etching in potassium hydroxide solution at 70°C, which is found to be self-terminated at the AlGaN/GaN interface with negligible effect on the underlying GaN layer, manifesting itself easy to control, highly repeatable, and promising for industrialization. The fabricated device based on this technique with atomic layer deposition Al2O3 as gate insulator exhibits a threshold voltage as high as 3.2 V with a maximum drain current over 200 mA/mm and a 60% increased breakdown voltage than that of the conventional high electron mobility transistors.

Frequency-Independent Asymmetric Double-

In this paper, we report the device performance of a high-voltage normally off Al₂O₃/GaN MOSFET on the Si substrate. Normally off operation is obtained by multiple cycles of O₂ plasma oxidation and wet oxide-removal gate recess process. The recessed normally off GaN MOSFET with 3 μm gate-drain distance exhibits a maximum drain current of 585 mA/mm at 9 V gate bias. The threshold voltage of the MOSFET is 2.8 V with a standard derivation of 0.2 V on the sample with an area of 2 × 2 cm². The gate leakage current is below 10^-6 mA/mm during the whole gate swing up to 9 V and the ION/IOFF ratio is larger than 109, indicating the good quality of Al₂O₃ gate insulator. The MOSFET with 10 μm gate-drain distance shows a three terminal OFF-state breakdown voltage (BV) of 967 V at zero gate-source bias with a drain leakage current criterion of 1 μA/mm. The specific ON-resistance (R_ON,SP) of the device is 1.6 mQ · cm² and the power figure of merit (BV²/R_ON,SP) is 584 MW/cm².

pi

Despite the great potential of the application of surface-enhanced Raman scattering (SERS), the difficulty in fabricating suitable SERS substrates is still a problem. Based on the self-assembly of silica nanoparticles, a simple method is here proposed to fabricate a highly-ordered, 3D, petal-like arrayed structure (3D PLAS) that serves as a promising SERS substrate for both its high reproducibility and enormous SERS enhancement. Such a novel structure is easily achieved by anisotropically etching a self-assembly bilayer of silica nanoparticles, followed by metal deposition. The SERS performance of the 3D PLAS and its relationship with the main parameters, including the etching time, the diameter of silica nanoparticles, and the deposited metal film, are characterized using 632.8 nm incident light. With Rhodamine 6G as a probe molecule, the spatially averaged SERS enhancement factor is on the order of 5 × 10(7) and the local enhancement factor is much higher, both of which can be improved further by optimizing the parameters.

Equivalent Circuit for On-Chip Spiral Inductors: Physics-Based Modeling and Parameter Extraction

A simple lithography-free approach for fabricating diversiform nanostructure forests is presented. The key technique of the approach is that randomly distributed nanoscale residues can be synthesized on substrates simply by removing photoresist with oxygen plasma bombardment. These nanoresidues can function as masks in the subsequent etching process for nanopillars. By further spacer and then deep etching processes, a variety of forests composed of regular, tulip-like or hollow-head nanopillars as well as nanoneedles are successfully achieved in different etching conditions. The pillars have diameters of 30-200 nm and heights of 400 nm-3 microm. The needles reach several microns in height, with their tips less than 10 nm in diameter. Moreover, microstructures containing these nanostructure forests, such as surface microchannels, have also been fabricated. This approach is compatible with conventional micro/nano-electromechanical system (MEMS/NEMS) fabrication.

Fabrication of Normally Off AlGaN/GaN MOSFET Using a Self-Terminating Gate Recess Etching Technique

This note introduced a complete fabrication strategy of Parylene C-caulked PDMS (pcPDMS) for low permeability required microfluidics applications. The bonding issue enrolled in the pcPDMS fabrication was solved based on careful surface analyses of the Parylene C caulked status in the PDMS matrix.

900 V/1.6

This paper reports for the first time a novel technique of nanoscale localized stress-introducing achieved by focused ion beam. The technique can be used to fabricate three-dimensional (3D) nanohelixes and implement 3D nanometer assemblies with the advantages of high flexibility, controllability and repeatability. Using the technique, 3D nanohelixes in both fixed-free and fixed-fixed forms with different structure parameters are successfully fabricated. In addition, a 3D cubic frame with 600-nm-wide beams is successfully assembled from two-dimensional patterns.

{\rm m}\Omega\cdot{\rm cm}^{2}

The great advances in nanotechnology call for advances in miniaturized power sources for micro/nano-scale systems. Nanofluidic channels have received great attention as promising high-power-density substitutes for ion exchange membranes for use in energy harvesting from ambient ionic concentration gradient, namely reverse electrodialysis. This paper proposes the nanofluidic crystal (NFC), of packed nanoparticles in micro-meter-sized confined space, as a facile, high-efficiency and high-power-density scaling-up scheme for energy harvesting by nanofluidic reverse electrodialysis (NRED). Obtained from the self-assembly of nanoparticles in a micropore, the NFC forms an ion-selective network with enormous nanochannels due to electrical double-layer overlap in the nanoparticle interstices. As a proof-of-concept demonstration, a maximum efficiency of 42.3 ± 1.84%, a maximum power density of 2.82 ± 0.22 W m(-2), and a maximum output power of 1.17 ± 0.09 nW/unit (nearly three orders of magnitude of amplification compared to other NREDs) were achieved in our prototype cell, which was prepared within 30 min. The current NFC-based prototype cell can be parallelized and cascaded to achieve the desired output power and open circuit voltage. This NFC-based scaling-up scheme for energy harvesting based on NRED is promising for the building of self-powered micro/nano-scale systems.