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Dive into the research topics where Marc D. Knox is active.

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Featured researches published by Marc D. Knox.


semiconductor thermal measurement and management symposium | 2012

Development of a flexible chip infrared (IR) thermal imaging system for product qualification

Chenzhou Lian; Marc D. Knox; Kamal K. Sikka; Xiaojin Wei; Alan J. Weger

A flexible and efficient chip Infrared (IR) thermal imaging system was implemented on the product manufacturing test platform by collaboration with the burn-in/wafer test, systems, process, and failure analysis teams. A liquid cooling cell was successfully designed and tested. The imaging system was applied to investigate some wafer probe power/thermal issues for server high end products. Furthermore, we applied the method of Spatially-resolved Imaging of Microprocessor Power (SIMP) [1] to translate the thermal map into a power map. Finally, we propose a new concept of product thermal qualification as a supplement and potential alternative to the traditional thermal test vehicle (TTV) qualification.


Ibm Journal of Research and Development | 2007

Optimization of silicon technology for the IBM system z9

Daniel J. Poindexter; Scott Richard Stiffler; Philip T. Wu; Paul D. Agnello; Thomas H. Ivers; Shreesh Narasimha; Thomas B. Faure; Jed H. Rankin; David A. Grosch; Marc D. Knox; Daniel C. Edelstein; M. Khare; Gary B. Bronner; Hyunjang Nam; Shahid Butt

IBM 90-nm silicon-on-insulator (SOI) technology was used for the key chips in the System z9TM processor chipset. Along with system design, optimization of some critical features of this technology enabled the z9TM to achieve double the system performance of the previous generation. These technology improvements included logic and SRAM FET optimization, mask fabrication, lithography and wafer processing, and interconnect technology. Reliability improvements such as SRAM optimization and burn-in reliability screen are also described.


Archive | 1999

ACTIVELY CONTROLLED HEAT SINK FOR CONVECTIVE BURN-IN OVEN

John A. Fredeman; David L. Gardell; Marc D. Knox; Mark Raymond Laforce


Archive | 2008

Integrated circuit testing methods using well bias modification

Anne E. Gattiker; David A. Grosch; Marc D. Knox; Phil Nigh; Jody J. Van Horn; Paul S. Zuchowski


Archive | 2005

METHOD AND APPARATUS FOR TEMPORARY THERMAL COUPLING OF AN ELECTRONIC DEVICE TO A HEAT SINK DURING TEST

Paul J. Aube; Normand Cote; Roger G. Gamache; David L. Gardell; Paul M. Gaschke; Marc D. Knox; Denis D. Turcotte


Archive | 1998

Burn in technique for chips containing different types of IC circuitry

David A. Grosch; Marc D. Knox


Archive | 2001

Method of burning in an integrated circuit chip package

Roger G. Gamache; David L. Gardell; Marc D. Knox


Archive | 2011

Methods and apparatus for margin testing integrated circuits using asynchronously timed varied supply voltage and test patterns

David A. Grosch; Marc D. Knox; Erik A. Nelson; Brian C. Noble


Archive | 2011

Efficient methods and apparatus for margin testing integrated circuits

David A. Grosch; Marc D. Knox; Erik A. Nelson; Brian C. Noble


Archive | 2003

Device burn in utilizing voltage control

Dennis R. Conti; Roger G. Gamache; David L. Gardell; Marc D. Knox; Jody J. Van Horn

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