María Ángela Pampillón
Complutense University of Madrid
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Featured researches published by María Ángela Pampillón.
Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena | 2013
María Ángela Pampillón; P. C. Feijoo; Enrique San Andrés; M. L. Lucía
Gadolinium oxide thin films were deposited on silicon by a two-step process: high pressure sputtering from a metallic gadolinium target followed by an in situ plasma oxidation. Several plasma conditions for metal deposition and oxidation were studied in order to minimize the growth of a SiOx layer at the interface between the high permittivity dielectric and the silicon substrate and to avoid substrate damage. Plasma emission was studied with glow discharge optical spectroscopy. The films were structurally characterized by Fourier transform infrared spectroscopy. Metal–insulator–semiconductor capacitors were fabricated with two different top metals (titanium and platinum) to analyze the influence of deposition conditions and the metal choice. Pt gated devices showed an interfacial SiOx regrowth after a forming gas annealing, while Ti gates scavenge the interface layer.
Semiconductor Science and Technology | 2015
María Ángela Pampillón; P. C. Feijoo; E. San Andrés; H. García; H. Castán; S. Dueñas
In this work, we analyze the scavenging effect of titanium gates on metal-insulator-semiconductor capacitors composed of gadolinium oxide as dielectric material deposited on Si and InP substrates. The Gd2O3 film was grown by high pressure sputtering from a metallic target followed by an in situ plasma oxidation. The thickness of the Ti film was varied between 2.5 and 17 nm and was capped with a Pt layer. For the devices grown on Si, a layer of 5 nm of Ti decreases the capacitance equivalent thickness from 2.3 to 1.9 nm without compromising the leakage current (10−4 A cm−2 at Vgate = 1 V). Thinner Ti has little impact on device performance, while 17 nm of Ti produces excessive scavenging. For InP capacitors, the scavenging effect is also observed with a decrease in the capacitance equivalent thickness from 2.5 to 1.9 nm (or an increase in the accumulation capacitance after the annealing from ~1.4 to ~1.7–1.8 μF cm−2). The leakage current density remains under 10−2 A cm−2 at Vgate = 1.5 V. For these devices, a severe flatband voltage shift with frequency is observed. This can be explained by a very high interface trap state density (in the order of 1013–1014 eV−1 cm−2).
Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena | 2013
A. Gómez; H. Castán; Hector H. Garcia; S. Dueñas; L. Bailón; María Ángela Pampillón; P. C. Feijoo; Enrique San Andrés
In this work, the electrical characterization of Gd2O3 and Sc2O3-based metal–insulator–silicon (MIS) structures has been performed using capacitance–voltage, deep level transient spectroscopy, conductance transients, flat-band voltage transients, and current–voltage techniques. High-k films were deposited by high pressure sputtering using Sc and Gd metallic films in a pure Ar plasma and, subsequently, in situ room temperature plasma oxidation in a mixed Ar/O2 atmosphere was performed. Three different metals were used as gate electrodes: aluminium, platinum, and titanium, in order to check electrical differences of the samples and to check the interface scavenging after high-k dielectric deposition. In particular, it was proved that Ti electrode is a well SiO2 interlayer scavenger for both materials. Additionally, the authors observed that the predominant conduction mechanism for these high-k based-MIS structures is Poole–Frenkel emission, as usually reported for high-k dielectrics.
Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena | 2013
P. C. Feijoo; María Ángela Pampillón; Enrique San Andrés
High κ gadolinium oxide thin layers were deposited on silicon by high-pressure sputtering (HPS). In order to optimize the properties for microelectronics applications, different deposition conditions were used. Ti (scavenger) and Pt (nonreactive) were e-beam evaporated to fabricate metal–insulator–semiconductor (MIS) devices. According to x-ray diffraction, x-ray photoelectron spectroscopy, and Fourier-transform infrared spectroscopy, polycrystalline stoichiometric Gd2O3 films were obtained by HPS. The growth rate decreases when increasing the deposition pressure. For relatively thick films (40 nm), a SiOx interface as well as the formation of a silicate layer (GdSiOx) is observed. For thinner films, in Ti gated devices the SiOx interface disappears but the silicate layer extends over the whole thickness of the gadolinium oxide film. These MIS devices present lower equivalent oxide thicknesses than Pt gated devices due to interface scavenging. The density of interfacial defects Dit is found to decrease wi...
Semiconductor Science and Technology | 2013
P. C. Feijoo; María Ángela Pampillón; E. San Andrés; J L G Fierro
Gd-rich gadolinium scandate (Gd2–xScxO3) was deposited by high-pressure sputtering on (1 0 0) silicon by alternating the deposition of <0.5 nm thick films of its binary components: Sc2O3 and Gd2O3. The formation of the ternary oxide was observed after the thermal treatments, with a high increase in the effective permittivity of the dielectric (up to 21). The silicon diffuses into the Gd2–xScxO3 films, which show an amorphous character. After the annealing no interfacial silicon oxide is present. CHF–VG curves indicated low hysteresis (55 mV) and a density of interfacial defects of 6 × 10 11 eV –1 cm –2 . (Some figures may appear in colour only in the online journal)
Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena | 2013
María Ángela Pampillón; Carmina Cañadilla; P. C. Feijoo; Enrique San Andrés; Álvaro del Prado
The electrical properties of metal–oxide–semiconductor devices based on GdOx obtained by high pressure sputtering on InP substrates are studied. In order to prevent damage of the semiconductor substrate, an optimized two-step sputtering procedure has been used for the high permittivity dielectric deposition. First, a thin metallic Gd film was sputtered using a metallic Gd target and a pure Ar plasma. Then, without extracting the sample from the system, the GdOx films were obtained by plasma oxidation using an Ar/O2 mixed atmosphere and reducing plasma power to minimize damage and interfacial regrowth. The resulting devices show fully functional capacitance curves. After forming gas annealing, the capacitors do not show interface regrowth up to a temperature of 500 °C and the gate leakage stays within reasonable limits, below 2 × 10−4 Acm−2 at a gate voltage of 1.5 V. In addition, the interface trap density remains roughly constant with annealing temperature up to 400 °C, in the low 1013 eV−1cm−2 range, de...
spanish conference on electron devices | 2015
Z. Gao; M. F. Romero; María Ángela Pampillón; E. San Andrés; F. Calle
Thermal stability of AlGaN/GaN MOS-HEMTs and -diodes using Gd<sub>2</sub>O<sub>3</sub> are investigated by means of different thermal cycles and storage tests up to 500°C for one week. IV DC and pulsed characteristics of the devices before and after the processes are evaluated and compared with conventional HEMTs. Results show that the devices with Gd<sub>2</sub>O<sub>3</sub> dielectric layer have lower leakage current and a more stable behavior during thermal treatment processes compared with conventional devices. In fact, an excellent on/off ratio of about 10<sup>8</sup> and a stable V<sub>t</sub> is observed after storage at high temperature. The beneficial effects of Gd<sub>2</sub>O<sub>3</sub> on trapping effects of MOS-HEMTs are also discussed.
IEEE Electron Device Letters | 2017
Z. Gao; M. F. Romero; A. Redondo-Cubero; María Ángela Pampillón; E. San Andrés; F. Calle
AlGaN/GaN high electron mobility transistors (HEMTs) and MOS-HEMTs using Gd2O3 as gate dielectric were irradiated with 2-MeV protons up to fluence of
spanish conference on electron devices | 2013
E. San Andrés; María Ángela Pampillón; Carmina Cañadilla; P. C. Feijoo; A. del Prado
1 \times 10^{15}
spanish conference on electron devices | 2013
P. C. Feijoo; María Ángela Pampillón; Enrique San Andrés
cm−2. Results showed that proton irradiation causes a strong degradation in the Schottky gate devices, featured by more than three orders of magnitude increase in reverse leakage current, a 30% decrease in maximum drain current, and the same percentage of increase in ON-resistance, respectively. Scanning transmission electron microscopy showed that radiation induced a diffusion of Ni into Au in the gate and void formation, degrading the transistors’ characteristics. The Gd2O3 gate dielectric layer prevented this diffusion and void formation. MOS-HEMTs with Gd2O3 gate dielectric show 50% less decrease of performance under proton irradiation than Schottky gate HEMTs (conventional HEMTs). The trapping effects of Gd2O3 gate layer before and after irradiation are also discussed.