Mariam Momenzadeh

Testing of quantum cellular automata

There has been considerable research on quantum dot cellular automata (QCA) as a new computing scheme in the nanoscale regimes. The basic logic element of this technology is the majority voter. In this paper, a detailed simulation-based characterization of QCA defects and study of their effects at logic level are presented. Testing of these QCA devices at logic level is investigated and compared with conventional CMOS-based designs. Unique testing features of designs based on this technology are presented and interesting properties have been identified. A testing technique is presented; it requires only a constant number of test vectors to achieve 100% fault coverage with respect to the fault list of the original design. A design-for-test scheme is also presented, which results in the generation of a reduced test set at 100% fault coverage.

Characterization, test, and logic synthesis of and-or-inverter (AOI) gate design for QCA implementation

Quantum-dot cellular automata (QCA) offers a new computing paradigm for nanotechnology. The basic logic elements of this technology are the majority voter (MV) and the inverter (INV). However, an experimental evaluation has shown that MV is not efficiently used during technology mapping by existing logic-synthesis tools. In this paper, we propose the design and characterization of a novel complex, yet very small, QCA logic gate: the and-or-inverter (AOI) gate. The paper presents a detailed simulation-based analysis of the AOI gate, as well as the study of QCA defects and their effects at the logic level. The AOI implements a universal logic gate; all elementary gates can be implemented by the AOI gate. Moreover, many two-level logic functions can be directly implemented by a single AOI gate. The AOI gate performs quite favorably, in terms of digital logic synthesis. Unlike MV, this gate is efficiently used by existing logic-synthesis tools. Our experimental data on synthesis of complex designs show that using the AOI gate instead of MV, results in up to 23.9% logic area savings, while improving the overall delay.

Defects and faults in quantum cellular automata at nano scale

There has been considerable research on quantum dot cellular automata (QCA) as a new computing scheme in the nano-scale regimes. The basic logic element of this technology is majority voter. In this paper, a detailed simulation-based characterization of QCA defects and study of their effects at logic-level are presented. Testing of these devices is investigated and compared with conventional CMOS-based designs. Unique testing features of designs based on this technology are presented and interesting properties have been identified.

Modeling QCA defects at molecular-level in combinational circuits

This paper analyzes the deposition defects in devices and circuits made of quantum-dot cellular automata (QCA) for molecular implementation. Differently from metal-based QCA, in this type of implementation a defect may occur due to the erroneous deposition of cells (made of molecules) on a substrate, i.e. no cell, or an additional cell is placed either near, or within the layout configuration of a QCA device. The effects of an erroneous cell deposition defect are analyzed by considering the induced functional faults for different QCA devices, such as the majority voter, the inverter and various wire configurations (straight, L-shape, coplanar crossing and fanout). Extensive simulation results are provided. As an example, testing of an EXOR circuit is analyzed in detail.

Design of sequential circuits by quantum-dot cellular automata

This paper proposes a detailed design analysis of sequential circuits for quantum-dot cellular automata (QCA). This analysis encompasses flip-flop (FF) devices as well as circuits. Initially, a novel RS-type FF amenable to a QCA implementation is proposed. This FF extends a previous threshold-based configuration to QCA by taking into account the timing issues associated with the adiabatic switching of this technology. The characterization of a D-type FF as a device consisting of an embedded wire is also presented. Unique timing constraints in QCA sequential logic design are identified and investigated. An algorithm for assigning appropriate clocking zones to a QCA sequential circuit is proposed. A technique referred to as stretching is used in the algorithm to ensure timing and delay matching. This algorithm relies on a topological sorting and enumeration step to consistently traversing only once the edges of the graph representation of the QCA sequential circuit. Examples of QCA sequential circuits are provided.

Defect characterization and tolerance of QCA sequential devices and circuits

This paper analyzes the defect tolerance of sequential devices and circuits implemented by molecular quantum-dot cellular automata (QCA). Initially, a novel QCA SR-type flip-flop is proposed; this flip-flop is the first sequential device for QCA and it takes into account the timing issues associated with the adiabatic switching of this technology. Using a defect model by which single additional and missing cells are considered in a molecular implementation, simulation results are provided for a logic-level characterization of the defects. Also for sequential circuits, defect tolerance is pursued and shown to affect the functionality of basic QCA devices, resulting mostly in unwanted inversion and stuck-at faulty behavior at logic level.

Design and characterization of an and-or-inverter (AOI) gate for QCA implementation

Quantum-dot Cellular Automata (QCA) offers a new computing paradigm in nanotechnology. The basic logic elements of this technology are the inverter and the majority voter. In this paper, we propose a novel complex and universal QCA gate: the And-Or-Inverter (AOI) gate, which is a 5 input gate consisting of 7 cells. This paper presents a detailed simulation-based analysis of the AOI gate as well as the characterization of QCA defects and study of their effects at logic level. Design implementations using the AOI gate are compared with the conventional CMOS and the majority voter-based QCA methodology. Testing of the AOI gate at logic level is also addressed, unique testing features of designs based on this complex gate have been investigated.

Analysis of missing and additional cell defects in sequential quantum-dot cellular automata

The defect characterization of sequential devices and circuits, implemented by molecular quantum-dot cellular automata (QCA), is analyzed in this paper. A RS-type flip-flop is first introduced; this flip-flop takes into account the timing issues associated with the adiabatic switching of this technology and its requirements. It is then shown that a D-type flip-flop can be constructed with an embedded QCA wire which extends over multiple clocking zones. The logic-level characterization of both flip-flop devices is provided. A single additional and missing cell defect model is assumed for molecular implementation. For sequential circuits, defect characterization is pursued. It is shown that defects affect the functionality of basic QCA devices, resulting mostly in unwanted inversion and majority voter acting as a wire at logic level. In this paper, it is shown that a device-level characterization of the defects and faults can be consistently extended to a circuit-level analysis.

Quantum cellular automata: new defects and faults for new devices

Summary form only given. There has been considerable research on quantum cellular automata (QCA) as a new computing scheme in the nanoscale regimes. A detailed simulation-based characterization of defects in different QCA logic and interconnect devices and study of their effects at logic-level are presented. Various failure mechanisms which can potentially happen during nanomannfacturing of these devices have been considered and simulated. Different implementations of QCA logic devices and interconnects are also compared in term of defect tolerance and testability. The same study is performed for new proposed QCA devices too. The simulation results show that additional fault models at logic level must be considered for testing of QCA-based circuits.

Simulation-based design of modular QCA Circuits

The design of quantum-dot cellular automata (QCA) circuits and systems is still in an infancy stage; a modular technique which relies on building blocks referred to as tiles, is proposed in this paper. This approach consists of first analyzing the logic capabilities of the basic tiles (inclusive of simulation) followed by logic mapping and connecting the tiles to form the desired circuit. The 3/spl times/3 QCA grid is presented as an example of basic block. Five types of tiles can be constructed using the 3/spl times/3 grid. A logic characterization of these tiles is presented by using a coherence vector simulation engine. It is shown that the 3/spl times/3 grid is not only area efficient, but it also offers versatile logic operation. Various QCA circuits designed using the tile-based method are presented and compared with conventional gate-based design as well as the SQUARES methodology.