Mark DeHerrera

Magnetoresistive random access memory using magnetic tunnel junctions

Magnetoresistive random access memory (MRAM) technology combines a spintronic device with standard silicon-based microelectronics to obtain a combination of attributes not found in any other memory technology. Key attributes of MRAM technology are nonvolatility and unlimited read and write endurance. Magnetic tunnel junction (MTJ) devices have several advantages over other magnetoresistive devices for use in MRAM cells, such as a large signal for the read operation and a resistance that can be tailored to the circuit. Due to these attributes, MTJ MRAM can operate at high speed and is expected to have competitive densities when commercialized. In this paper, we review our recent progress in the development of MTJ-MRAM technology. We describe how the memory operates, including significant aspects of reading, writing, and integration of the magnetic material with CMOS, which enabled our recent demonstration of a 1-Mbit memory chip. Important memory attributes are compared between MRAM and other memory technologies.

A 1-Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects

A low-power 1-Mb magnetoresistive random access memory (MRAM) based on a one-transistor and one-magnetic tunnel junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM memory demonstration to date. In this circuit, the magnetic tunnel junction (MTJ) elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high-permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming. The 25-mm/sup 2/ 1-Mb MRAM circuit operates with address access times of less than 50 ns, consuming 24 mW at 3.0 V and 20 MHz. The 1-Mb MRAM circuit is fabricated in a 0.6-/spl mu/m CMOS process utilizing five layers of metal and two layers of poly.

High density submicron magnetoresistive random access memory (invited)

Various giant magnetoresistance material structures were patterned and studied for their potential as memory elements. The preferred memory element, based on pseudo-spin valve structures, was designed with two magnetic stacks (NiFeCo/CoFe) of different thickness with Cu as an interlayer. The difference in thickness results in dissimilar switching fields due to the shape anisotropy at deep submicron dimensions. It was found that a lower switching current can be achieved when the bits have a word line that wraps around the bit 1.5 times. Submicron memory elements integrated with complementary metal–oxide–semiconductor (CMOS) transistors maintained their characteristics and no degradation to the CMOS devices was observed. Selectivity between memory elements in high-density arrays was demonstrated.

Nonvolatile RAM based on magnetic tunnel junction elements

Magnetoresistive random access memory (MRAM), is based on magnetic memory elements integrated with CMOS. Key attributes of MRAM technology are nonvolatility and unlimited read and write endurance. Recent advances in magnetic tunnel junction (MTJ) materials give MRAM the potential for high speed, low operating voltage, and high density.

The science and technology of magnetoresistive tunneling memory

Rapid advances in portable communication and computing systems are creating an increasing demand for nonvolatile random access memory that is both high-density and highspeed. Existing solid-state technologies are unable to provide all of the needed attributes in a single memory solution. Therefore, a number of different memories are currently being used to achieve the multiple functionality requirements, often compromising performance and adding cost to the system. A new technology, magnetoresistive random access memory (MRAM) based on magnetoresistive tunneling, has the potential to replace these memories in various systems with a single, universal solution. The key attributes of MRAM are nonvolatility, high-speed operation. and unlimited read and write endurance. This technology is enabled by the ability to deposit high-quality, nanometer scale tunneling barriers that display enhanced magnetoresistive response. In this article we describe several fundamental technical and scientific aspects of MRAM with emphasis on recent accomplishments that enabled our successful demonstration of a 256-Kb memory chip.

Thermally activated magnetization reversal in submicron magnetic tunnel junctions for magnetoresistive random access memory

We have measured thermally activated magnetization reversal of the free layers in submicron magnetic tunnel junctions to be used for magnetoresistive random access memory. We applied magnetic field pulses to the bits with a pulse duration tp ranging from nanoseconds to 0.1 ms. We have measured the switching probability as a function of tp with a fixed field amplitude H, and as a function of H for fixed tp. For both cases, we find good agreement with the switching probability predicted by the Arrhenius–Neel theory for thermal activation over a single energy barrier.

A low power 1 Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects

A low power 1 Mb Magnetoresistive Random Access Memory (MRAM) based on a 1-Transistor and 1-Magnetic Tunnel Junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM memory demonstration to date. In this circuit, MTJ elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming the bits. The 25 mm/sup 2/ 1 Mb MRAM circuit operates with address access times of less than 50 ns, consuming 24 mW at 3.0 V and 20 MHz. The circuit is fabricated in a 0.6 /spl mu/m CMOS process utilizing five layers of metal and two layers of poly.

Fundamentals of MRAM Technology

Developments in portable communication and computing systems are creating a growing demand for nonvolatile random access memory that is dense and fast. None of the existing solid-state memories can provide all the needed attributes in a single memory solution. Therefore, to achieve the required multiple functionality requirements, a number of different memories are being used while compromising performance and adding cost to the system. Magnetoresistive Random Access Memory (MRAM) has the potential to replace these memories in various systems with a single, universal memory solution. Key attributes of MRAM technology are nonvolatility and unlimited read and write endurance. In addition, MRAM can operate at high-speed and is expected to have competitive densities. In this paper we describe several fundamental technical and scientific aspects of MRAM with emphasis on recent accomplishments that enabled our successful demonstration of a 256 kbit memory chip.

A 0.18 /spl mu/m 4Mb toggling MRAM

A low power 4Mb Magnetoresistive Random Access Memory (MRAM) with a new magnetic switching mode is presented for the first time. The memory cell is based on a 1-Transistor 1-Magnetic Tunnel Junction (1TIMTJ) bit cell. The 4Mb MRAM circuit was designed in a five level metal, 0.18/spl mu/m CMOS process with a bit cell size of 1.55/spl mu/m/sup 2/. A new cell architecture, bit structure, and switching mode improve the operational performance of the MRAM as compared to conventional MRAM. The 4Mb circuit is the largest MRAM memory demonstration to date.

A 256 kb 3.0 V 1T1MTJ nonvolatile magnetoresistive RAM

Magnetoresistive random access memory (MRAM) is based on magnetic memory elements integrated with CMOS. Key attributes of MRAM technology are nonvolatility and unlimited read and program endurance. A 256 kb nonvolatile MRAM is based on a memory cell defined by a single transistor (1T) and a single magnetic tunnel junction (MTJ) with read and write cycles <50 ns. The memory organization is 16 k×16. Measured read power consumption is 24 mW at 3 V and 20 MHz.