Mark Durlam

Magnetoresistive random access memory using magnetic tunnel junctions

Magnetoresistive random access memory (MRAM) technology combines a spintronic device with standard silicon-based microelectronics to obtain a combination of attributes not found in any other memory technology. Key attributes of MRAM technology are nonvolatility and unlimited read and write endurance. Magnetic tunnel junction (MTJ) devices have several advantages over other magnetoresistive devices for use in MRAM cells, such as a large signal for the read operation and a resistance that can be tailored to the circuit. Due to these attributes, MTJ MRAM can operate at high speed and is expected to have competitive densities when commercialized. In this paper, we review our recent progress in the development of MTJ-MRAM technology. We describe how the memory operates, including significant aspects of reading, writing, and integration of the magnetic material with CMOS, which enabled our recent demonstration of a 1-Mbit memory chip. Important memory attributes are compared between MRAM and other memory technologies.

Progress and outlook for MRAM technology

We summarize the features of existing semiconductor memories and compare them to Magnetoresistive Random Access Memory (MRAM),a semiconductor memory with magnetic bits for nonvolatile storage. MRAM architectures based on Giant Magnetoresistance (GMR) and Magnetic Tunnel Junction (MTJ) cells are described. This paper will discuss our progress on improving the material structures, memory bits, thermal stability of the bits, and competitive architectures for GMR and MTJ based MRAM memories as well as the potential of these memories in the commercial memory market.

A 1-Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects

A low-power 1-Mb magnetoresistive random access memory (MRAM) based on a one-transistor and one-magnetic tunnel junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM memory demonstration to date. In this circuit, the magnetic tunnel junction (MTJ) elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high-permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming. The 25-mm/sup 2/ 1-Mb MRAM circuit operates with address access times of less than 50 ns, consuming 24 mW at 3.0 V and 20 MHz. The 1-Mb MRAM circuit is fabricated in a 0.6-/spl mu/m CMOS process utilizing five layers of metal and two layers of poly.

High density submicron magnetoresistive random access memory (invited)

Various giant magnetoresistance material structures were patterned and studied for their potential as memory elements. The preferred memory element, based on pseudo-spin valve structures, was designed with two magnetic stacks (NiFeCo/CoFe) of different thickness with Cu as an interlayer. The difference in thickness results in dissimilar switching fields due to the shape anisotropy at deep submicron dimensions. It was found that a lower switching current can be achieved when the bits have a word line that wraps around the bit 1.5 times. Submicron memory elements integrated with complementary metal–oxide–semiconductor (CMOS) transistors maintained their characteristics and no degradation to the CMOS devices was observed. Selectivity between memory elements in high-density arrays was demonstrated.

Nonvolatile RAM based on magnetic tunnel junction elements

Magnetoresistive random access memory (MRAM), is based on magnetic memory elements integrated with CMOS. Key attributes of MRAM technology are nonvolatility and unlimited read and write endurance. Recent advances in magnetic tunnel junction (MTJ) materials give MRAM the potential for high speed, low operating voltage, and high density.

The science and technology of magnetoresistive tunneling memory

Rapid advances in portable communication and computing systems are creating an increasing demand for nonvolatile random access memory that is both high-density and highspeed. Existing solid-state technologies are unable to provide all of the needed attributes in a single memory solution. Therefore, a number of different memories are currently being used to achieve the multiple functionality requirements, often compromising performance and adding cost to the system. A new technology, magnetoresistive random access memory (MRAM) based on magnetoresistive tunneling, has the potential to replace these memories in various systems with a single, universal solution. The key attributes of MRAM are nonvolatility, high-speed operation. and unlimited read and write endurance. This technology is enabled by the ability to deposit high-quality, nanometer scale tunneling barriers that display enhanced magnetoresistive response. In this article we describe several fundamental technical and scientific aspects of MRAM with emphasis on recent accomplishments that enabled our successful demonstration of a 256-Kb memory chip.

End domain states and magnetization reversal in submicron magnetic structures

Patterned submicron magnetic thin films of various geometries have been systematically studied. We have observed end domain states in rectangular elements, which is in excellent agreement with micromagnetic simulation results. Significant deviation from single domain behavior has been found in low aspect ratio elements. We will show that this deviation is attributed to behavior of the end domains.

A low power 1 Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects

A low power 1 Mb Magnetoresistive Random Access Memory (MRAM) based on a 1-Transistor and 1-Magnetic Tunnel Junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM memory demonstration to date. In this circuit, MTJ elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming the bits. The 25 mm/sup 2/ 1 Mb MRAM circuit operates with address access times of less than 50 ns, consuming 24 mW at 3.0 V and 20 MHz. The circuit is fabricated in a 0.6 /spl mu/m CMOS process utilizing five layers of metal and two layers of poly.

Submicron spin valve magnetoresistive random access memory cell

Spin valve magnetoresistive random access memory cells with widths varying from 1.5 to 0.25 μm and an aspect ratio of length/width more than 10 were fabricated and tested. In general, the switching field of the free magnetic layer was found to be inversely proportional to the width of the cell. Adequate pinning was shown for cell width down to 0.75 μm. For 0.5 and 0.25 μm wide cells, the switching field of the free magnetic layer is comparable to the pinning field of the other magnetic layer. So the pinned magnetic layer rotates with the free magnetic layer. The giant magnetoresistive ratio of the cell drops dramatically. Potentially, this may be a fundamental problem for this memory mode. Solutions are proposed.

High density nonvolatile magnetoresistive RAM

Non-volatile memory cells based on ferromagnetically coupled giant magneto-resistive (GMR) material were patterned into submicron feature sizes. Switching characteristics of such cells allow for bipolar signal reading which is twice the intrinsic magnetoresistance change of the material. Excellent thermal stability is reported for deep submicron memory cells.