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Dive into the research topics where Markus Fink is active.

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Featured researches published by Markus Fink.


cpmt symposium japan | 2010

Embedded wafer level ball grid array (eWLB) technology for system integration

Klaus Pressel; Gottfried Beer; Thorsten Meyer; Maciej Wojnowski; Markus Fink; Gerald Ofner; B. Römer

Silicon front-end and assembly and packaging technology more and more merge. In addition interconnect density reaches limits for advanced CMOS technology. In this paper we introduce the fan-out embedded wafer level packaging technology, which is an example to link front-end and packaging technology and offers additional freedom for interconnect design. We demonstrate capabilites for system integration of the eWLB technology, which includes system on chip (SoC) integration and system in package (SiP) integration like side by side and stacking of devices. We highlight the importance of understanding properties of new materials, which influence warpage or heat dissipation. We also show the excellent performance of the eWLB package for mm-wave applications.


international conference on thermal, mechanical and multi-physics simulation and experiments in microelectronics and microsystems | 2010

Simulation-based analysis of the Heat-Affected Zone during target preparation by pulsed- laser ablation through stacked silicon dies in 3D integrated System-in-Packages

Stefan Martens; Markus Fink; Walter Mack; Friedemann Voelklein; Juergen Wilde

The trends of 3D integration and System-in-Package (SiP) require the adaptation of target preparation methods for failure analysis of these complex integrated devices. Recent improvements in laser-based target preparation make laser cross-sections through several stacked silicon dies possible with remarkably small visible Heat-Affected Zones (HAZs). The distinct removal of Molding Compound (MC), silicon dies, and metal interconnects with a single laser source was demonstrated.


cpmt symposium japan | 2016

Virtual prototyping methodology for assessment of the interaction between wire bond pad design and bond process parameters to enhance the robustness of copper wire bond interconnect

Chai Chee Meng; Markus Fink; Laurens Weiss

Wire bond interconnection still remains to be one of the most important fields of study in IC packaging development. The robustness of the interconnection between the bond wire and the bond pad are highly dependent on several key factors, mainly: 1) bond pad design, 2) capillary design, and 3) wire bond profile. Consequently, these factors also affect the package quality and reliability. Destructive test methods such as bond pull test and bond shear test are commonly used for Process Control to evaluate the interfacial strength between the bond wire and bond pad. However, these types of destructive test methods provide little or no insight about how the interaction of the aforementioned factors might affect the under-pad layers susceptibility to damage.


Archive | 2004

Electronic component and semiconductor wafer, and method for producing the same

Michael Bauer; Peter Strobel; Gerald Ofner; Edward Fürgut; Simon Jerebic; Thomas Bemmerl; Markus Fink; Hermann Vilsmeier


Archive | 2005

Heat sink for surface-mounted semiconductor devices

Uwe Dipl.-Ing. Luckner; Georg Ernst; Manuel Dr. Carmona; Markus Fink


Archive | 2007

Semiconductor module having a semiconductor chip stack and method

Markus Brunnbauer; Markus Fink; Hans-Gerd Jetten


Archive | 2004

Electrical device comprising conductors made of carbonized plastic, and method and apparatus for the production thereof

Michael Bauer; Thomas Bemmerl; Markus Fink; Edward Fuergut; Horst Groeninger; Hermann Vilsmeier


international conference on thermal, mechanical and multi-physics simulation and experiments in microelectronics and microsystems | 2014

Challenges of viscoelastic characterization of low TG epoxy based adhesives for automotive applications in DMA and relaxation experiments

I. Maus; H. Preu; M. Niessner; Markus Fink; K.M.B. Jansen; R. Pantou; B. Michel; B. Wunderle


Archive | 2005

Kühlkörper für oberflächenmontierte Halbleiterbauteile und Montageverfahren

Manuel Dr. Carmona; Georg Ernst; Markus Fink; Uwe Dipl.-Ing. Luckner


Archive | 2003

Semiconductor wafer for electronic components, with integrated circuits in lines and columns for semiconductor chips on wafer top surface with strip-shaped dividing regions between chip integrated circuits

Michael Bauer; Thomas Bemmerl; Markus Fink; Edward Fürgut; Simon Jerebic; Gerald Ofner; Peter Strobel; Hermann Vilsmeier

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