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Martin Streibl

Qimonda

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Publication

Featured researches published by Martin Streibl.

international solid-state circuits conference | 2007

Cascading Techniques for a High-Speed Memory Interface

Zheng Gu; Peter Gregorius; Daniel Kehrer; Lydia Neumann; Evelyn Neuscheler; Thomas Rickes; Hermann Ruckerbauer; Martin Streibl; Juergen Zielbauer

A memory interface operating up to 5.3Gb/s in a 70nm standard DRAM process is presented. The interface uses differential point-to-point signaling in a chain of 6 devices, in transparent- or resample-repeat mode. Transparent-repeat mode measurements at 4.8Gb/s show eye reduction of 8% Ul per device due to jitter accumulation. The last device in the repeat chain has an eye opening of 0.5UI at BER < 1012. The transparent-repeat mode consumes 40% less power and has 80% less latency than resample mode

Archive | 2006

Method of transmitting data between different clock domains

Peter Gregorius; Martin Streibl; Thomas Rickes

Archive | 2008

METHODS AND ARTICLES OF MANUFACTURE FOR OPERATING ELECTRONIC DEVICES ON A PLURALITY OF CLOCK SIGNALS

Daniel Kehrer; Hermann Ruckerbauer; Martin Streibl

Archive | 2008

METHOD AND DEVICE FOR TRANSMITTING OUTGOING USEFUL SIGNALS AND AN OUTGOING CLOCK SIGNAL

Martin Streibl; Peter Gregorius

Archive | 2006

APPARATUS AND METHOD FOR AVOIDING STEADY-STATE OSCILLATIONS IN THE GENERATION OF CLOCK SIGNALS

Peter Gregorius; Thomas Rickes; Martin Streibl

Archive | 2006

Interface circuit for use in semiconductor memory chip, has serial input terminal to receive serial stream, and finite impulse response unit inserted into main write signal path between drift compensation FIFO-unit and serializer

Peter Gregorius; Thomas Rickes; Martin Streibl; Paul Wallner

Archive | 2008

Verfahren und Vorrichtung zum Übertragen von ausgehenden Nutzsignalen und eines ausgehenden Taktsignals

Martin Streibl; Peter Gregorius

Archive | 2007

Data communication method for different clock domains, involves receiving data bits from receive clock, sequential storing of data bits in ring buffer memory and transferring stored data bits from ring buffer memory to transmit clock

Peter Gregorius; Thomas Rickes; Martin Streibl

Archive | 2007

DATA RECEIVER WITH CLOCK RECOVERY CIRCUIT

Martin Streibl; Peter Gregorius; Thomas Rickes

Archive | 2007

Datenübergabeeinheit zum Übertragen von Daten zwischen unterschiedlichen Taktbereichen

Peter Gregorius; Zheng Gu; Thomas Rickes; Martin Streibl

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Peter Gregorius

Qimonda

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Thomas Rickes

Qimonda

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Daniel Kehrer

Qimonda

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Hermann Ruckerbauer

Qimonda

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Zheng Gu

Qimonda

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Evelyn Neuscheler

Qimonda

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Juergen Zielbauer

Qimonda

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Lydia Neumann

Qimonda

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Paul Wallner

Qimonda

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