Thomas Rickes
Qimonda
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Publication
Featured researches published by Thomas Rickes.
international solid-state circuits conference | 2007
Zheng Gu; Peter Gregorius; Daniel Kehrer; Lydia Neumann; Evelyn Neuscheler; Thomas Rickes; Hermann Ruckerbauer; Martin Streibl; Juergen Zielbauer
A memory interface operating up to 5.3Gb/s in a 70nm standard DRAM process is presented. The interface uses differential point-to-point signaling in a chain of 6 devices, in transparent- or resample-repeat mode. Transparent-repeat mode measurements at 4.8Gb/s show eye reduction of 8% Ul per device due to jitter accumulation. The last device in the repeat chain has an eye opening of 0.5UI at BER < 1012. The transparent-repeat mode consumes 40% less power and has 80% less latency than resample mode
Archive | 2007
Martin Streibl; Peter Gregorius; Ralf Schledz; Thomas Rickes; Zheng Gu
Archive | 2006
Peter Gregorius; Martin Streibl; Thomas Rickes
Archive | 2006
Peter Gregorius; Thomas Rickes; Martin Streibl
Archive | 2006
Peter Gregorius; Thomas Rickes; Martin Streibl; Paul Wallner
Archive | 2014
Dieter Metzner; Thomas Rickes; Paul Wallner; Peter Widerin
Archive | 2014
Dieter Metzner; Thomas Rickes; Paul Wallner; Peter Widerin
Archive | 2007
Peter Gregorius; Thomas Rickes; Martin Streibl
Archive | 2007
Martin Streibl; Peter Gregorius; Thomas Rickes
Archive | 2007
Peter Gregorius; Zheng Gu; Thomas Rickes; Martin Streibl
