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Dive into the research topics where Masahiko Higashi is active.

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Featured researches published by Masahiko Higashi.


Japanese Journal of Applied Physics | 2007

Diffusion Control Techniques for TiN Stacked Metal Gate Electrodes for p-Type Metal Insulator Semiconductor Field Effect Transistors

Shinsuke Sakashita; Takaaki Kawahara; M. Mizutani; Masao Inoue; Kenichi Mori; S. Yamanari; Masahiko Higashi; Yukio Nishida; Kazuhito Honda; Naofumi Murata; Junichi Tsuchimoto; Jiro Yugami; Hidefumi Yoshimura; Masahiro Yoneda

We have investigated a polycrystalline silicon (poly-Si)/chemical vapor deposited titanium nitride (CVD-TiN) stacked structure as a metal gate with a high-k for p-type metal insulator semiconductor field effect transistors (p-MISFETs). A divided-CVD method provided an appropriate effective work function (4.9–5.2 eV) on HfSiON for p-MISFETs. However, the deposition of poly-Si on CVD-TiN films shifted the effective work function to a midgap (~4.6 eV), and Ti, Hf, and Si diffused into poly-Si/CVD-TiN/high-k structures during poly-Si deposition. Then, we found that an increase in the deposition temperature of CVD-TiN films and the insertion of a physical vapor deposited (PVD)-TiN film between the poly-Si and CVD-TiN layers are effective in suppressing these diffusions. In particular, the insertion of the PVD-TiN film provided an appropriate effective work function of 4.9 eV. Therefore, we found that the diffusion control techniques for poly-Si/TiN/high-k stacked structures are highly effective for obtaining the appropriate work function for p-MISFETs.


Japanese Journal of Applied Physics | 2009

Mobile-Ion-Induced Charge Loss Failure in Silicon–Oxide–Nitride–Oxide–Silicon Two-Bit Storage Flash Memory

Kazunori Imaoka; Masahiko Higashi; Hidehiko Shiraiwa; Fumihiko Inoue; Tatsuya Kajita; Shigetoshi Sugawa

In silicon–oxide–nitride–oxide–silicon (SONOS) 2-bit storage flash memory, we discovered deterioration of data retention (DR) in the form of charge loss, which is dependent on the distance between contact windows and word lines (WLs) and also on the thermal treatment performed after the formation of contact windows. We hypothesized that the unique structure of the SONOS flash memory leads to susceptibility to mobile ion contamination. We concluded that Na mobile ion contamination originates in the tungsten chemical–mechanical polishing (W-CMP) process, and that the ions diffuse through the boundaries of the boron phosphosilicate glass (BPSG) and stacked oxide–nitride–oxide (ONO) films into the cell area. We successfully reduced the charge loss by cleaning of the contamination source and by the stable control of phosphorus concentration at the bottom of the BPSG. As a permanent countermeasure, we proposed the complete isolation of contact windows from the adjacent ONO layer, and we were able to demonstrate the effectiveness of this proposal.


Archive | 2005

Semiconductor memory and method of fabricating the same

Hiroshi Murai; Masahiko Higashi


Archive | 2013

FABRICATING METHOD OF MIRROR BIT MEMORY DEVICE HAVING SPLIT ONO FILM WITH TOP OXIDE FILM FORMED BY OXIDATION PROCESS

Masahiko Higashi


Archive | 2006

Semiconductor device with reduced transistor breakdown voltage for preventing substrate junction currents

Hiroaki Kouketsu; Masahiko Higashi


Archive | 2005

SEMICONDUCTEUR DEVICE AND METHOD FOR MANUFACTURING SAME

Hiroaki Kouketsu; Masahiko Higashi


Archive | 2008

SONOS DEVICE WITH INSULATING STORAGE LAYER AND P-N JUNCTION ISOLATION

Hiroshi Murai; Masahiko Higashi


Archive | 2007

Methods and structures for discharging plasma formed during the fabrication of semiconductor device

Masahiko Higashi; Naoki Takeguchi


Archive | 2011

Fabrication method for semiconductor device having laminated electronic conductor on bit line

Kenichi Fujii; Masahiko Higashi


Archive | 2011

Semiconductor device having laminated electronic conductor on bit line

Kenichi Fujii; Masahiko Higashi

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