Masanobu Tsuchitani
Toshiba
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Publication
Featured researches published by Masanobu Tsuchitani.
international symposium on power semiconductor devices and ic s | 1998
Shizue Hori; Masanobu Tsuchitani; Akihiko Oosawa; Yoshiro Baba; Shigeo Yawata
In order to obtain high voltage and high reliability devices, the semi-insulating polycrystalline silicon (SIPOS) film and reduced surface field (RESURF) structure are selected from several planar junction termination techniques. A 4.5 kV IGBT was realized using the SIPOS RESURF structure with some optimizations. The termination structure is optimized for high voltage by the RESURF length and the boron ion implantation dosage of the RESURF layer. The SIPOS film is optimized to reduce transient voltage-induced leakage current (TVIC) and to obtain high reliability. As a result, a 5.0 kV static blocking voltage IGBT without TVIC is realized using a 525 /spl mu/m thickness/450 /spl Omega/cm resistivity substrate.
Archive | 1995
Yoshiro Baba; Satoshi Yanagiya; Noboru Matsuda; Akihiko Osawa; Masanobu Tsuchitani
Archive | 1999
Masanobu Tsuchitani; Keita Suzuki; Akihiko Osawa; Yoshiro Baba
Archive | 2004
Masanobu Tsuchitani; Tetsuo Matsuda; Hideki Okumura; Atsuko Yamashita
Archive | 1997
Noboru Matsuda; Yoshiro Baba; Satoshi Yanagiya; Masanobu Tsuchitani
Archive | 2005
Noboru Matsuda; Koichi Takahashi; Keiko Kawamura; Masanobu Tsuchitani
Archive | 2007
Ichiro Omura; Yoko Sakiyama; Hideki Nozaki; Atsushi Murakoshi; Masanobu Tsuchitani; Koichi Sugiyama; Tsuneo Ogura; Masakazu Yamaguchi; Tatsuo Naijo
Archive | 2000
Masanobu Tsuchitani; Shingo Satou
Archive | 1999
Shigeru Hasegawa; Hideo Matsuda; Yoshiro Baba; Masanobu Tsuchitani
Archive | 2005
Keiko Kawamura; Masanobu Tsuchitani