Masao Nishida

A high efficiency GaAs power amplifier module with a single voltage for digital cellular phone systems

This work describes a two-stage 0.2 cc power amplifier (PA) module with single voltage operation for digital cellular phone system terminals. A new GaAs FET structure enables this operation. To increase power-added efficiency, it is found to be advantageous to use heat spreading with a Cu plate in the cavity and second-order harmonic suppression with the trap capacitor built into the drain bias circuit. Output power of 30.5 dBm with power added efficiency of 54% has been obtained at 1.45 GHz and 3.5 V.

Ultra-compact 1 W GaAs SPDT switch IC

An ultra-compact 1 W GaAs SPDT switch IC operating at +3/0 V is demonstrated. The switch IC consists of multi-gate FETs in which multiple gate electrodes are arranged between source and drain electrodes. By optimizing device parameters, the chip size has been reduced to 1.1 mm/spl times/0.55 mm. Also, the N/sup +/ regions in the FET are connected by fine high-resistance elements to provide a uniform electric potential between gate electrodes. As a result, the linearity of the output power is improved 1 dB at a frequency of 0.9 GHz.

A novel design concept for a super compact power amplifier module (SCPAM) using a multilayer substrate

This paper presents a novel circuit and layout design concept for a Super Compact Power Amplifier Module (SCPAM) using a multilayer substrate. This concept enables miniaturization of the module, while continuing to allow easy design and good performance. A 0.04 cc 1 W class module for mobile communication systems is demonstrated. A 0.02 cc module including this concept is also proposed.

A Superlow-Noise AlGaAs/InGaAs/GaAs Doped Channel Heterojunction Field-Effect Transistor (DC-HFET) with 0.15-µm Gate Length

A doped channel heterojunction field-effect transistor (DC-HFET) has been developed using an AlGaAs/InGaAs/GaAs pseudomorphic system which has an electron confinement effect superior to that of an AlGaAs/GaAs system. An excellent minimum noise figure (NFmin) of 0.65 dB and associated gain (Ga) of 11.3 dB were realized at 12 GHz (drain current (Ids)=18 mA, drain voltage (Vds)=2 V). The NF had weak dependences on the Ids and frequency, as in the case of high electron mobility transistors (HEMTs). The transconductance (gm) at Ids=10 mA was 385 mS/mm and maximum gm reached 570 mS/mm (Ids=50 mA).

A super low-noise ion-implanted planar GaAs MESFET MMIC amplifier

In order to develop an ultra-compact and super low-noise MMIC amplifier for the receiving system of PHS, the input and output impedance of an ion-implanted planar GaAs MESFET were successfully reduced while maintaining its high-gain and low-noise characteristics. The MMIC had a noise figure of 1 dB and a gain of 13.5 dB at 3 V, 20 mA and 1.9 GHz in an ultra-compact plastic package. The fabricated switch and LNA module employing this MMIC has achieved the low-noise property of less than 3 dB.

An improved MMIC design system composed of an electron beam direct drawing, microwave simulation and on-wafer measurement subsystems

An improved design system is introduced to develop not only new monolithic microwave ICs (MMICs) and their element devices, but also their accurate simulation models. It is composed of electron beam (EB) direct drawing, microwave simulation, and on-wafer measurement subsystems connected through the LAN. Successful preliminary applications of this system are demonstrated for improved T-shaped 0.1 mu m length gate formation and an amplifier designed using this improved simulation model. The system and its advantages are described.<<ETX>>