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Dive into the research topics where Masayoshi Tarutani is active.

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Featured researches published by Masayoshi Tarutani.


Journal of Applied Physics | 1999

Modeling of gas-phase and surface reactions in liquid-source chemical-vapor deposition of (Ba,Sr)TiO3 films

Mikio Yamamuka; Takaaki Kawahara; Masayoshi Tarutani; Tsuyoshi Horikawa; Tatsuo Oomori; Kouichi Ono

Reaction mechanisms for chemical-vapor deposition (CVD) of (Ba,Sr)TiO3 (BST) films have been studied by modeling reactions that should occur in the gas phase and on the film surfaces. We considered a conventional model and two other kinds of models: a copolymerization and a surface reflection model. The conventional model consisted of thermal decomposition of dipivaloylmethanato (DPM) source materials in the gas phase, followed by deposition of the decomposition products on the film surfaces. In the copolymerization model, Ba(DPM)2 and Sr(DPM)2 were assumed to preferentially copolymerize with TiO(DPM)2 in the gas phase, and the resulting products behave as dominant film precursors. In the surface reflection model, moreover, each source material was assumed to thermally decompose in the gas phase, and the products from TiO(DPM)2 adsorbed on film surfaces prevent the other Ba and Sr precursors from sticking onto the surfaces. Numerical simulations were performed for CVD of SrTiO3 films, and the atomic incor...


Thin Solid Films | 2002

Improved fabrication process for Ru/BST/Ru capacitor by liquid source chemical vapor deposition

Masayoshi Tarutani; Mikio Yamamuka; Takashi Takenaga; Takeharu Kuroiwa; Tsuyoshi Horikawa

Abstract We have investigated (Ba,Sr)TiO 3 (BST) films grown on Ru by a liquid source chemical vapor deposition (CVD). Inductively coupled plasma mass spectrometry (ICP-MS) analysis revealed the decline of (Ba+Sr)/Ti molar ratio of the initial BST-layer on Ru. By readjusting the flow ratio of the liquid sources and using a two-step deposition method, we obtained 30-nm-thick BST films with a uniform composition profile and exhibiting good electrical properties. The leakage property, however, was severely deteriorated in BST films less than 24 nm thick. Scanning electron microscopy observation showed the presence of micro-roughness or micro-hillocks in these films. An annealing process of the Ru electrode was added for its planarization, and the CVD process was also improved to suppress oxidation of Ru. As a result, we obtained smooth and finely crystallized ∼20-nm-thick BST films with good electrical properties at an equivalent SiO 2 thickness ( t eq ) of ∼0.45 nm and leakage current −7 A/cm 2 . We also measured the properties of BST films deposited on the three-dimensional Ru electrode.


international symposium on power semiconductor devices and ic's | 2015

Next generation 650V CSTBT TM with improved SOA fabricated by an advanced thin wafer technology

Ryu Kamibaba; Kazuya Konishi; Yusuke Fukada; Atsushi Narazaki; Masayoshi Tarutani

Using an advanced thin wafer technology, we have successfully fabricated the next generation 650V class IGBT with an improved SOA and maintaining the narrow distribution of the electrical characteristics for industrial applications. The applied techniques were the finer pattern transistor cell, the thin wafer process and the optimized back side doping concentration profiles. With the well organized back-side wafer process, the practically large chip has achieved without any sacrifice of the production yield. As a results, VCEsat-Eoff trade-off relationship and an Energy of Short Circuit by active Area (ESC/A) are improved in comparison with the conventional Punch Through (PT) structure.


Materials Science Forum | 2014

Demonstration of High Quality 4H-SiC Epitaxial Growth with Extremely Low Basal Plane Dislocation Density

Takanori Tanaka; Naoyuki Kawabata; Yoichiro Mitani; Nobuyuki Tomita; Masayoshi Tarutani; Takeharu Kuroiwa; Yoshihiko Toyoda; Masayuki Imaizumi; Hiroaki Sumitani; Satoshi Yamakawa

SiC epitaxial layer with low basal plane dislocation (BPD) density of 0.2/cm2 was successfully grown under higher C/Si ratio, which is found on the investigation about growth conditions. In order to study conversion mechanism of BPDs to threading edge dislocations (TEDs), angles between directions of BPD lines on a substrate and that of moving edges of steps ([11-2) during growth were examined. Consequently, it was revealed that almost 98% of BPDs are converted to TEDs for the case of the absolute angles above 45°. This high conversion ratio is considered to be induced by enhanced lateral growth under the higher C/Si ratio condition.


international symposium on power semiconductor devices and ic s | 2016

Experimental demonstration of the active trench layout tuned 1200V CSTBT™ for lower dV/dt surge and turn-on switching loss

Kazuya Konishi; Ryu Kamibaba; Mariko Umeyama; Atsushi Narazaki; Tetsuo Takahashi; Akihiko Furukawa; Masayoshi Tarutani

Optimization of a cell structure affecting gate capacitance must have an important role to upgrade usability of IGBT at high frequency operation. In this paper, we report an experimental study on the IGBT cell structures with various arrangements of active trenches connected to gate. Utilizing the advanced active trench layout with well-balanced capacitance realized to lower dV/dt surge and turn-on switching loss.


Materials Science Forum | 2015

Influence of Growth Pressure and Addition of HCl Gas on Growth Rate of 4H-SiC Epitaxy

Takanori Tanaka; Naoyuki Kawabata; Yoichiro Mitani; Masashi Sakai; Nobuyuki Tomita; Masayoshi Tarutani; Takeharu Kuroiwa; Yoshihiko Toyoda; Masayuki Imaizumi; Hiroaki Sumitani; Satoshi Yamakawa

The reduction of the growth pressure was demonstrated to have the same effect as the addition of chloride-containing gas on preventing the Si nucleation and the epitaxy with high growth rate (>50 μm/h) was achieved by using the decreasing pressure condition in a horizontal CVD reactor without chloride-containing gas. The quality of a 30-μm-thick epilayer grown with 40 μm/h was also investigated. Downfall and triangle defect density in the layer was as low as 0.16 /cm2, indicating that a high quality epitaxial wafer can be easily obtained under the condition with high throughput in the sinple CVD system.


Materials Science Forum | 2014

Demonstration of High Quality 4H-SiC Epitaxy by Using the Two-Step Growth Method

Yoichiro Mitani; Nobuyuki Tomita; Kenichi Hamano; Masayoshi Tarutani; Takanori Tanaka; Akihito Ohno; Takeharu Kuroiwa; Yoshihiko Toyoda; Masayuki Imaizumi; Hiroaki Sumitani; Satoshi Yamakawa

A new growth method for considerably suppressing generation of carrot and triangle defects is presented. Based on the investigation for the surfaces before and after the epitaxial growth, it becomes clear that those defects were results from micrometer-scale SiC particles. For removing the particles, pre-flow of H2 at high temperature before the growth was very effective. The density of those defects strongly depends on the condition of the pre-flow and especially decreased at Tp=1575°C and tp=180 sec.


international symposium on power semiconductor devices and ic s | 2016

Simple simulation approach for the first trigger step of SEB (single event burn-out) based upon physical analysis for Si high voltage bipolar device

Yasuhiro Yoshiura; M. Tabata; H. Muraoka; N. Taniguchi; Kenji Suzuki; Shinji Aono; Masayoshi Tarutani; Tadaharu Minato; K. Takakura; K. Uryu

Through the physical analysis, the first and minimum destruction point of the power semiconductor chip is precisely identified as around the main pn junction. It well agrees with the Impact Ionization (I/I) peak enhanced by an electric field crowding. A simple device simulation approach, which uses a visible light approximation (optical generation) instead of a high energy radiation ion, is effective to trace the SEB phenomenon. Several fundamental settings were studied to simulate the experimental results.


international symposium on power semiconductor devices and ic s | 2016

The second-generation 600V RC-IGBT with optimized FWD

Takuya Yoshida; Tetsuo Takahashi; Kenji Suzuki; Masayoshi Tarutani

A Reverse Conducting IGBT (RC-IGBT) is a promising device to reduce a size and cost of the power module thanks to the integration of IGBT and FWD into a single chip. However, it is difficult to achieve well-balanced performance between IGBT and FWD. Indeed, the total inverter loss of the conventional RC-IGBT was not so small as the individual IGBT and FWD pair. To minimize the loss, the most important key is the improvement of reverse recovery characteristics of FWD. We carefully extracted five effective parameters to improve the FWD characteristics, and investigated the impact of these parameters by using simulation and experiments. Finally, optimizing these parameters, we succeeded in fabricating the second-generation 600V class RC-IGBT with a smaller FWD loss than the first-generation RC-IGBT.


Archive | 2011

SILICON CARBIDE EPITAXIAL WAFER AND MANUFACTURING METHOD THEREFOR, SILICON CARBIDE BULK SUBSTRATE FOR EPITAXIAL GROWTH AND MANUFACTURING METHOD THEREFOR AND HEAT TREATMENT APPARATUS

Nobuyuki Tomita; Kenichi Hamano; Masayoshi Tarutani; Yoichiro Mitani; Takeharu Kuroiwa; Masayuki Imaizumi; Hiroaki Sumitani; Kenichi Ohtsuka; Tomoaki Furusho; Takao Sawada; Yuji Abe

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Tsuyoshi Horikawa

National Institute of Advanced Industrial Science and Technology

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