Meike Hauschildt

Statistical analysis of electromigration lifetimes and void evolution

Electromigration failure statistics and the origin of the log-normal standard deviation for copper interconnects were investigated by analyzing the statistics of electromigration lifetime and void size distributions at various stages during testing. Experiments were performed on 0.18μm wide Cu interconnects with tests terminated after certain amounts of resistance increase, or after a specified test time. The lifetime and void size distributions were found to follow log-normal distribution functions. The sigma values of these distributions decrease with increasing test time. The statistics of resistance-based void size distributions can be simulated by considering geometrical variations of the void shape. In contrast, the characteristics of time-based void size distributions require consideration of kinetic aspects of the electromigration process. The sigma values of lifetime distributions can be adequately simulated by combining the statistics of both types of void size distributions. Thus, a statistical...

Grain structure analysis and effect on electromigration reliability in nanoscale Cu interconnects

The grain structure in Cu interconnects of the 45 nm node was analyzed to yield grain orientation and boundary characteristics using a high-resolution electron diffraction technique. A dominant sidewall growth of {111} grains was observed, reflecting the importance of interfacial energy in controlling grain growth below 70 nm linewidth. The grain structure was used to identify flux divergent sites for void formation under electromigration (EM) and to analyze the effect on EM statistics for Cu lines with CoWP capping using a microstructure-based model. This analysis established a correlation between the microstructure of Cu nanolines, void formation kinetics, and EM statistics.

Electromigration early failure void nucleation and growth phenomena in Cu and Cu(Mn) interconnects

Electromigration early failure void nucleation and growth phenomena were studied using large-scale, statistical analysis methods. A total of about 496,000 interconnects were tested over a wide current density and temperature range (j = 3.4 to 41.2 mA/μm2, T = 200 to 350°C) to analyze the detailed behavior of the current density exponent n and the activation energy Ea. The results for the critical V1M1 downstream interface indicate a reduction from n = 1.55±0.10 to n = 1.15±0.15 when lowering the temperature towards 200°C for Cu-based interconnects. This suggests that the electromigration downstream early failure mechanism is shifting from a mix of nucleation-controlled (n = 2) and growth-controlled (n = 1) to a fully growth-controlled mode, assisted by the increased thermal stress at lower temperatures (especially at use conditions). For Cu(Mn)-based interconnects, a drop from n = 2.00±0.07 to n = 1.64±0.2 was found, indicating additional effects of a superimposed incubation time. Furthermore, at lower current densities, the Ea value seems to drop for both Cu and Cu(Mn) interconnects by a slight, but significant amount of 0.1 - 0.2eV. Implications for extrapolations of accelerated test data to use conditions are discussed. Furthermore, the scaling behavior of the early failure population at the NSD=-3 level (F~0.1%) was analyzed, spanning 90, 65, 45, 40 and 28 nm technology nodes.

Geometry and Microstructure Effect on EM-Induced Copper Interconnect Degradation

Statistical analysis of electromigration (EM) lifetimes of inlaid copper interconnects, in situ microscopy experiments at embedded inlaid copper interconnect structures, and numerical simulations of grain growth and EM degradation processes are necessary for future on-chip interconnect systems with high immunity to EM-induced failure. Experimental results, i.e., statistics of lifetime and void distributions, copper microstructure data from electron backscatter diffraction studies, as well as in situ scanning electron microscopy and transmission X-ray microscopy studies of EM degradation processes, are discussed for inlaid interconnect structures, varying geometry and process conditions. EM failure statistics for a large number of interconnects and in situ studies for a selected number of samples, which allow to visualize the time-dependent evolution of voids, demonstrate that interconnect degradation and, eventually, interconnect failure depend on interface bonding and the copper microstructure. With decreasing interconnect dimensions, the copper microstructure will become more critical for interconnect reliability.

Analysis of electromigration statistics for Cu interconnects

Electromigration failure statistics and the origin of the lognormal standard deviation for copper interconnects were investigated by analyzing the statistics of electromigration lifetimes and void size distributions at various stages during testing. A statistical correlation between electromigration lifetimes and void evolution was established. Using simulation to fit the experimental data, the parameters influencing the electromigration lifetime statistics were identified as variations in void sizes, geometrical and experimental factors of the electromigration experiment, and kinetic aspects of the mass transport process, such as differences in the interface diffusivity between the lines.

Large-scale statistical analysis of early failures in Cu electromigration, Part I: Dominating mechanisms

With continuing scaling of Cu-based metallization, the electromigration (EM) failure risk has remained one of the most important reliability concerns for advanced process technologies. The main factors requiring attention are the activation energy related to the dominating diffusion mechanism, the current exponent as well as the median lifetimes and lognormal standard deviation values of experimentally acquired failure time distributions. In general, the origin and scaling behavior of these parameters are relatively well understood. However, the observation of strong bimodality for the electron up-flow direction in dual-inlaid Cu interconnects has added complexity. The failure voids can occur both within the via (“early” mode) or within the trench (“late” mode). Over the last few years, bimodality has been reported also in down-flow EM, leading to very short lifetimes due to small, slit-shaped voids under vias. These voids, requiring only a very limited amount of mass movement, are generally causing conce...

In situ study on low-k interconnect time-dependent-dielectric-breakdown mechanisms

An in situ transmission-electron-microscopy methodology is developed to observe time-dependent dielectric breakdown (TDDB) in an advanced Cu/ultra-low-k interconnect stack. A test structure, namely a “tip-to-tip” structure, was designed to localize the TDDB degradation in small dielectrics regions. A constant voltage is applied at 25 °C to the “tip-to-tip” structure, while structural changes are observed at nanoscale. Cu nanoparticle formation, agglomeration, and migration processes are observed after dielectric breakdown. The Cu nanoparticles are positively charged, since they move in opposite direction to the electron flow. Measurements of ionic current, using the Triangular-Voltage-Stress method, suggest that Cu migration is not possible before dielectric breakdown, unless the Cu/ultra-low-k interconnect stacks are heated to 200 °C and above.

Advanced metallization concepts and impact on reliability

This study examines several possible back-end-of-line process options for future leading edge, high performance semiconductor devices, discussing effects on electrical and reliability characteristics as well as specific processing challenges. The extendibility of current physical vapor deposition-based processes for barrier layers, based on existing tool sets and therefore representing the most cost-efficient solution, is reviewed. Subsequently, alloying options such as Cu(Mn) in the seed are highlighted, showing excellent reliability, but also leading to challenges with electrical performance. Furthermore, the applicability of atomic layer and chemical vapor deposition processes for barrier applications and their limits are examined. The electromigration advantage of selective metallic capping processes such as electroless cobalt–tungsten–phosphorus deposition and chemically-vapor-deposited cobalt is highlighted, while process challenges are shown. Additionally, the need for careful adjustment of the Cu plating process and evaluation of electromigration performance upon changes to the barrier/liner/seed process is discussed.

Large‐Scale Statistical Study of Electromigration Early Failure for Cu/low‐k Interconnects

Even after the successful introduction of Cu‐based metallization, the electromigration (EM) failure risk has remained one of the important reliability concerns for advanced process technologies. The main factors requiring attention are the activation energy related to the dominating diffusion mechanism, the current exponent as well as the median lifetimes and lognormal standard deviation values of experimentally acquired failure time distributions. In general, the origin and scaling behavior of these parameters are relatively well understood. However, the observation of strong bimodality for the electron up‐flow direction in dual‐inlaid Cu interconnects is adding complexity. The failure voids can occur both within the via (“early” mode) or within the trench (“late” mode). Very recently, bimodality has been reported also in down‐flow EM, leading to very short lifetimes due to small, slit‐shaped voids under vias. For a more thorough investigation of these early failure phenomena, specific test structures we...

Large-scale statistical analysis of early failures in Cu electromigration, Part II: Scaling behavior and short-length effects

The first part of this study, presented in a separate paper, focused on the early failure mechanisms in down-flow electromigration. Since bimodality can occur at very small percentage levels, specific test structures were designed based on the Wheatstone Bridge technique. The use of these structures enabled a tested sample size past 800,000 for the 90 nm technology node, allowing a direct analysis of electromigration failure mechanisms at the single-digit ppm regime. The activation energy for the down-flow early failure mechanism was determined to be 0.83±0.01 eV, significantly lower than the usually reported activation energy of about 0.90 eV for electromigration-induced diffusion along Cu/SiCN interfaces. Very short experimental lifetimes due to small, slit-shaped voids under vias were found to control the chip lifetime at operating conditions. In this second part of our large-scale, statistical study, we will discuss the electromigration scaling behavior across 90, 65, and 45 nm technologies. Results i...