Michael G. Haverty

The ultimate CMOS device and beyond

For the past 40 years, relentless focus on Moores Law transistor scaling has delivered ever-improving CMOS transistor density. This paper discusses architectural and materials options which will contribute to the ultimate CMOS device. In addition, the paper reviews device options beyond the ultimate CMOS device.

Divacancies in carbon nanotubes and their influence on electron scattering

First-principles calculations are applied to study the formation energies of various divacancy defects in armchair and zigzag carbon nanotubes of varying diameter, and the transport properties for the corresponding structures. Our explicit ab initio calculations confirm that the lateral 585 divacancy is the most stable defect in small diameter tubes, with the 555 777 divacancy becoming more stable in armchair tubes larger than (30, 30). Evaluating the electron transmission as a function of diameter and chirality for a range of defects, the strongest scattering is found for the 555 777 divacancy configuration, which is observable in electrical spectroscopy experiments. Finally, validation of an approximation relating contributions from independent scattering sites enables the study of the characteristic localization length in large diameter tubes. Despite the fixed number of channels, localization lengths increase with increasing diameter and can exceed 100 nm for typical defect densities.

First Principle-Based Analysis of Single-Walled Carbon Nanotube and Silicon Nanowire Junctionless Transistors

Junctionless transistors made of silicon have previously been demonstrated experimentally and by simulations. Junctionless devices do not require fabricating an abrupt source-drain junction, and thus, can be easier to implement in aggressive geometries. In this paper, we explore a similar architecture for aggressively scaled devices with the channel consisting of doped carbon nanotubes (CNTs). Gate all around field effect transistor (FET) structures are investigated for n- and p- type doping. Current-voltage characteristics and subthreshold characteristics for a CNT-based junctionless FET is compared with a junctionless silicon nanowire FET with comparable dimensions. Despite the higher on-current of the CNT channels, the device characteristics are poorer compared to the silicon devices due to the smaller CNT bandgap.