Seiyon Kim
Intel
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Publication
Featured researches published by Seiyon Kim.
international electron devices meeting | 2012
Kelin J. Kuhn; Uygar E. Avci; Annalisa Cappellani; Martin D. Giles; Michael G. Haverty; Seiyon Kim; Roza Kotlyar; Sasikanth Manipatruni; Dmitri E. Nikonov; Chytra Pawashe; Marko Radosavljevic; Rafael Rios; Sadasivan Shankar; Ravi Vedula; Robert S. Chau; Ian Young
For the past 40 years, relentless focus on Moores Law transistor scaling has delivered ever-improving CMOS transistor density. This paper discusses architectural and materials options which will contribute to the ultimate CMOS device. In addition, the paper reviews device options beyond the ultimate CMOS device.
symposium on vlsi technology | 2010
Seiyon Kim; Ricky Tseng; Ben Jin; Uday Shah; Ibrahim Ban; Uygar E. Avci; Peter L. D. Chang
A 15-nm node floating body cell (FBC) memory was demonstrated utilizing silicon on replacement insulator (SRI) technology on bulk substrate. Highly selective SiGe etch and nano-scale anchors enabled the fabrication of silicon on thin replacement oxide of 12 nm. The memory characteristics show a memory signal of 7 µA and disturb retention time of 20 ms for a 51-nm gate length and 77-nm width device. This is the best FBC memory performance reported on bulk substrate.
Archive | 2011
Kelin J. Kuhn; Seiyon Kim; Rafael Rios; Stephen M. Cea; Martin D. Giles; Annalisa Cappellani; Titash Rakshit; Peter L. D. Chang
Archive | 2015
Glenn A. Glass; Kelin J. Kuhn; Seiyon Kim; Anand S. Murthy; Daniel B. Aubertine
Archive | 2011
Stephen M. Cea; Seiyon Kim; Annalisa Cappellani
Archive | 2015
Seiyon Kim; Daniel B. Aubertine; Kelin J. Kuhn; Anand S. Murthy
Archive | 2011
Stephen M. Cea; Cory E. Weber; Patrick H. Keys; Seiyon Kim; Michael G. Haverty; Sadasivan Shankar
Archive | 2007
Seiyon Kim; Peter L. D. Chang; Ibrahim Ban
Archive | 2006
Peter L. D. Chang; Seiyon Kim
Archive | 2013
Seiyon Kim; Rafael Rios; Fahmida Ferdousi; Kelin J. Kuhn