Michael Liehr

Experimental characterization of coaxial through silicon vias for 3D integration

Coaxial through silicon via (TSV) technology is gaining considerable interest as a 3D packaging solution due to its superior performance compared to the current existing TSV technology. By confining signal propagation within the coaxial TSV shield, signal attenuation from the lossy silicon substrate is eliminated, and unintentional signal coupling is avoided. In this paper, we propose and demonstrate a coaxial TSV 3D fabrication process. Next, the fabricated coaxial TSVs are characterized using s-parameters for high frequency analysis. The s-parameter data indicates the coaxial TSVs confine electromagnetic propagation by extracting the inductance and capacitance of the device. Lastly, we demonstrate the coaxial TSVs reduce signal attenuation and time delay by 35% and 25% respectively compared to the shield-less standard TSV technology. In addition, the coaxial interconnect significantly decreases electromagnetic coupling compared to traditional TSV architectures. The improved signal attenuation and high isolation of the coaxial TSV make it an excellent option for 3D packaging applications expanding into the millimeter wave regime.

The patterning center of excellence (CoE): an evolving lithographic enablement model

As EUV lithography moves toward high-volume manufacturing (HVM), a key need for the lithography materials makers is access to EUV photons and imaging. The SEMATECH Resist Materials Development Center (RMDC) provided a solution path by enabling the Resist and Materials companies to work together (using SUNY Polytechnic Institute’s Colleges of Nanoscale Science and Engineering (SUNY Poly CNSE) -based exposure systems), in a consortium fashion, in order to address the need for EUV photons. Thousands of wafers have been processed by the RMDC (leveraging the SUNY Poly CNSE/SEMATECH MET, SUNY Poly CNSE Alpha Demo Tool (ADT) and the SEMATECH Lawrence Berkeley MET) allowing many of the questions associated with EUV materials development to be answered. In this regard the activities associated with the RMDC are continuing. As the major Integrated Device Manufacturers (IDMs) have continued to purchase EUV scanners, Materials companies must now provide scanner based test data that characterizes the lithography materials they are producing. SUNY Poly CNSE and SEMATECH have partnered to evolve the RMDC into “The Patterning Center of Excellence (CoE)”. The new CoE leverages the capability of the SUNY Poly CNSE-based full field ASML 3300 EUV scanner and combines that capability with EUV Microexposure (MET) systems resident in the SEMATECH RMDC to create an integrated lithography model which will allow materials companies to advance materials development in ways not previously possible.

AIM Photonics — What merging photonics with nano-electronics will do

The National Network for Manufacturing Innovation (NNMI) is a network of research institutes in the United States that focuses on developing and commercializing manufacturing technologies through public-private partnerships between U.S. industry, universities, and federal government agencies. As one of the early institutes, the American Institute for Manufacturing integrated Photonics (AIM Photonics) was officially announced in July 2015. This Institute is focused on developing an end-to-end photonic integrated circuit (PIC) ecosystem in the U.S., including domestic foundry access, integrated design tools, automated packaging, assembly and test, and workforce development.

American Institute for Manufacturing Integrated Photonics (AIM Photonics)

The National Network for Manufacturing Innovation (NNMI) is a network of research institutes in the United States that focus on developing and commercializing manufacturing technologies through public-private partnerships between U.S. industry, universities, and federal government agencies. The newest Institute was announced July 27, 2015: The American Institute for Manufacturing Integrated Photonics (AIM Photonics). This Institute is focused on developing an end-to-end photonic integrated circuit (PIC) ecosystem in the U.S., including domestic foundry access, integrated design tools, automated packaging, assembly and test, and workforce development. The Institute will develop and demonstrate innovative manufacturing technologies for: 1) Ultra-high-speed transmission and switching of signals for the Internet and telecommunications 2) Microwave photonic PICs 3) Multi-sensor applications including chem-bio sensors, urban navigation, and other topics The AIM vision is to establish a technology, business and education framework for industry, government and academia to accelerate the transition of integrated photonic solutions from innovation to manufacturing-ready deployment in systems spanning commercial and defense applications. Silicon photonics has the potential to significantly reduce the cost of optical devices used in many traditional applications in addition to enabling new devices and applications. This is because of the maturity of CMOS processing facilities and infrastructure and because of the capabilities and efficiency of photonic integration. The ability to integrate photonic devices with CMOS electronics in a wafer scale manner can greatly increase the capacity of integrated circuits and reduce the size, weight, power dissipation while simultaneously increasing the reliability of the systems employing these components. The low loss of silicon waveguides enables large, complex passive components to be made without significant signal attenuation. It also improves the performance of lasers, resulting in lower thresholds and narrower linewidths. AIM Photonics provides a variety of solutions for integrating the critical functionality of III-V materials, ranging from monolithic InP PICs to heterogeneous materials integration. This presentation will summarize the AIM Photonics Institute and over 50 partners participating in the Institute. It will summarize the impact AIM Photonics can have on the Avionics community and ways for industrial, government and academic users to use the foundry and other services in AIM Photonics.

An AIM photonics update

The presentation describes the progress made in the first two years of operation on technical goals, operational framework, and opportunities for the broader photonics community. The institute is providing a turn key capability to industrial customers with a primary focus on SMEs, universities and government agencies.

Merging photonics with nanoelectronics (Conference Presentation)

The recently established American Institute for Manufacturing Photonics (AIM Photonics) is a manufacturing consortium headquartered in New York, with funding from the US Department of Defense (DoD), New York State, and industrial partners to advance the state of the art in the design, manufacture, testing, assembly, and packaging of integrated photonic devices. Dr. Michael Liehr, CEO of AIM Photonics, will describe the technical goals, operational framework, near-term milestones, and opportunities for the broader photonics community. The Institute intends to organize a currently fragmented domestic capability in integrated photonics. AIM Photonics will develop and demonstrate innovative manufacturing technologies for a number of key application sectors for integrated photonics devices. The Institute will furthermore specifically focus on establishing and building out an infrastructure in key areas required to accelerate the further adoption of integrated photonics. Specifically, we will enhance the available hardware development capability to include Si-based Multi-Project Wafer runs, InP-based Photonic Integrated Circuits, first and second level packaging, test and assembly.

The American Institute for Manufacturing Integrated Photonics: advancing the ecosystem

The American Institute for Manufacturing Integrated Photonics (AIM Photonics) is focused on developing an end-to-end integrated photonics ecosystem in the U.S., including domestic foundry access, integrated design tools, automated packaging, assembly and test, and workforce development. This paper describes how the institute has been structured to achieve these goals, with an emphasis on advancing the integrated photonics ecosystem. Additionally, it briefly highlights several of the technological development targets that have been identified to provide enabling advances in the manufacture and application of integrated photonics.

Integrating spin-torque-transfer magnetic memory in a 65 nm low power CMOS technology

This paper shows results of the integration of a 65 nm low power CMOS technology with spin-torque-transfer magnetic memory. This effort has focused upon a set of compatible, stable, and high yielding fabrication modules. Magnetic Tunnel Junction (MTJ) devices from a 64Mb array are shown and the device radiation hardness is demonstrated.