Michael R. Elliott

High-Performance Pipelined ADCs for Wireless Infrastructure Systems

This chapter provides an overview of design techniques and system aspects relevant to the application of high-speed pipelined ADCs in wireless base transceiver stations (BTS). The discussion begins with a derivation of typical ADC specifications for the receive path of a multi-carrier BTS system. Next, we investigate issues pertaining to the interface between the ADC and its driving circuitry, including complications that arise with sample-and-hold-amplifier-less (SHA-less) ADC frontends. Lastly, we summarize recent research results that look into the digital linearization of dynamic nonlinearities at the ADC’s frontend.

A dual channel IF-digitizing IC with 117dB dynamic range at 300Mhz IF for EDGE/GSM base-stations [receiver]

An integrated circuit is presented which receives an input IF frequency in the range of 70-300 MHz, and achieves 117 dB of dynamic range in a 200 kHz bandwidth (BW). An automatic-gain-control (AGC) loop is placed around the analog-to-digital converter (ADC). Amplitude-modulation (AM) caused by gain switching is corrected digitally.