Michael S. McCorquodale

A Monolithic and Self-Referenced RF LC Clock Generator Compliant With USB 2.0

A monolithic and self-referenced radio frequency (RF) LC clock generator that is compliant with USB 2.0 is demonstrated in a system-on-chip (SoC). This work presents the first successful approach to replacing an external crystal (XTAL), the crystal oscillator (XO) and the phase-locked loop for clock generation in an IC supporting USB 2.0 using a standard CMOS fabrication process. It is shown that the primary design challenges with the implemented approach involve maintaining high frequency accuracy and low jitter. Techniques for addressing both are shown. In particular, the presented architecture exploits the effects of frequency division and low far-from-carrier phase noise to achieve low jitter. From a 1.536 GHz temperature-compensated LC reference oscillator, coherent clock signals are derived at 96MHz for the SoC logic and 12 MHz for an on-chip full-speed USB PHY. Though self-referenced, approximately plusmn400ppm total frequency accuracy is achieved over process variations, plusmn10% variation in the USB power supply voltage and temperature variation from -10 to +85degC. Measured period and cycle-to-cycle jitter are 6.78 psrms and 8.96 psrms, respectively. Fabricated in a 0.35 mum CMOS technology, the clock generator occupies 0.22 mm2 and draws 9.5 mA from a 3.3-V supply, which is derived from the 5-V USB power supply

Accurate Analytical Spiral Inductor Modeling Techniques for Efficient Design Space Exploration

Efficient modeling techniques are required to accelerate design space exploration for integrated spiral inductors. In this letter, closed-form modeling techniques for the inductors physical inductance and substrate eddy currents are introduced. The model provides several orders of magnitude performance improvement over field-solver-based approaches with typical errors of less than 4% while demonstrating excellent agreement with measured data from fabricated inductors

Efficient analytical modeling techniques for rapid integrated spiral inductor prototyping

During the spiral inductor design process, designers and design automation tools require efficient modeling techniques for initial design space exploration in order to quickly pinpoint appropriate inductor geometries. In this paper, we introduce a new frequency-dependent model that utilizes closed-form expressions to quickly characterize square spiral inductors. Our modeling approach is centered on new analytical expressions for the inductors series resistance and series inductance. The model provides several orders of magnitude performance improvement over field solver-based approaches with typical errors of less than 3% when compared with numerical field solver simulations and demonstrates excellent agreement with measured data from inductors fabricated in TSMCs 0.18mum mixed-mode/RF process

A 0.5-to-480MHz Self-Referenced CMOS Clock Generator with 90ppm Total Frequency Error and Spread-Spectrum Capability

This work demonstrates a self-referenced CMOS LCO, or CMOS harmonic oscillator (CHO), that exhibits 90ppm total frequency error over process, bias and temperature, thus making it suitable for replacing XOs in many applications. Additionally, the clock generator can be configured to produce a number of different output frequencies, has 1/4 of the frequency error of the oscillator in [3] and includes a direct modulation technique enabling SSCG.

A Top-Down Microsystems Design Methodology and Associated Challenges

An overview of microsystems technology is presented along with a discussion of the recent trends and challenges associated with its development. A typical bottom-up design methodology is described and we propose, in contrast, an efficient and effective top-down methodology. We illustrate its implementation with the development of a microsystem design that has been completed and fabricated in CMOS technology. Gaps in the tool capabilities are identified and suggestions for future directions in CAD tool support for microsystems technology are presented.

A 25-MHz Self-Referenced Solid-State Frequency Source Suitable for XO-Replacement

Recent trends in the development of integrated silicon frequency sources are discussed. Within that context, a 25-MHz self-referenced solid-state frequency source is presented and demonstrated where measured performance makes it suitable for replacement of crystal oscillators (XOs) in data interface applications. The frequency source is referenced to a frequency-trimmed and temperature-compensated 800-MHz free-running LC oscillator (LCO) that is implemented in a standard logic CMOS process and with no specialized analog process options. Mechanisms giving rise to frequency drift in integrated LCOs are discussed and supported by analytical expressions. Design objectives and a compensation technique are presented where several implementation challenges are uncovered. Fabricated in a 0.25-mum 1P5M CMOS process, and with no external components, the prototype frequency source dissipates 59.4 mW while maintaining plusmn152 ppm frequency inaccuracy over process, plusmn 10% variation in the power supply voltage, and from - 10degC to 80degC. Variation against other environmental factors is also presented. Nominal period jitter and power-on start-up latency are 2.75 psrms and 268 mus, respectively. These performance metrics are compared with an XO at the same frequency.

A silicon die as a frequency source

A monolithic and unpackaged silicon die is presented as a frequency source suitable for quartz crystal resonator (XTAL) and oscillator (XO) replacement. The frequency source is referenced to a free-running, frequency-trimmed and temperature-compensated 3GHz RF LC oscillator. A programmable divider array enables the device to provide frequencies ranging from 6 to 133MHz. A post-processed Faraday shield contains fringing electromagnetic fields and enables the device to be delivered in unpackaged form such that it can be assembled into any package or via any assembly technique. The device dissipates approximately 2mA from a 1.8–3.3V power supply and drifts no more than ±300ppm over all operating conditions including a panel of industry-standard reliability tests.

Study and simulation of CMOS LC oscillator phase noise and jitter

In this work we review the processes of phase noise and jitter in electronic oscillators and the relationship between the two. Frequency and time domain simulation techniques and results are presented through the study of performance enhancement for a CMOS LC oscillator. The studied enhancements significantly reduce flicker noise upconversion, while the results demonstrate good agreement between time and frequency domain design approaches.

A 16-bit low-power microcontroller with monolithic MEMS-LC clocking

Low-power, single-chip integrated systems are prevailing in remote applications due to the increasing power and delay cost of inter-chip communication compared to on-chip computation. The paper describes the design and measured performance of a fully-functional digital core with a low-jitter, monolithic, MEMS-LC clock reference. This chip has been fabricated in TSMCs 0.18 μm MM/RF bulk CMOS process. Maximum power consumption of the complete microsystem is 48.78 mW operating at 90 MHz with a 1.8 V power supply.

Self-referenced, trimmed and compensated RF CMOS harmonic oscillators as monolithic frequency generators

Self-referenced, trimmed and temperature-compensated radio frequency (RF) CMOS LC, or harmonic oscillators (CHOs) are presented as high-accuracy and low-jitter monolithic frequency generators. CHOs are discussed within the context of recent efforts toward replacement of piezoelectric frequency references with silicon MEMS technology. In contrast, CHOs are self-referenced solid-state oscillators which can be fabricated in a standard microelectronic process technology. The CHO architecture and recent implementations are presented. Frequency- and time-domain performance of CHOs is reported and compared to the incumbent piezoelectric oscillators and emerging MEMS-referenced synthesizers. It is shown that CHOs achieve frequency error as low as plusmn26 ppm over 90degC and 1/6th the period jitter of MEMS-referenced synthesizers at the same frequency.