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Michael Sesterhenn

Infineon Technologies

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Publication

Featured researches published by Michael Sesterhenn.

Archive | 2004

Fabrication method for a trench capacitor with an insulation collar

Thomas Hecht; Till Schlösser; Michael Sesterhenn

Archive | 2005

Trough capacitor plate is formed by preparing a semiconductor wafer, etching a trough for each storage cell, and precipitating a layer containing a dopant on the wafer

Ulrich Scheler; Michael Sesterhenn; Johann Steinmetz; Stephan Wege

Archive | 2003

Integrated semiconductor memory with wordlines conductively connected to one another in pairs

Dirk Manger; Till Schlösser; Martin Popp; Michael Sesterhenn

Archive | 2004

Integrierter Halbleiterspeicher und Herstellungsverfahren

Dirk Manger; Martin Popp; Till Schlösser; Michael Sesterhenn

Archive | 2005

Making trench capacitor with insulating collar in substrate for use as semiconductor memory cell, employs selective masking, filling, lining and removal techniques

Stefan Tegen; Michael Sesterhenn

Archive | 2004

Production of integrated semiconductor memory comprises etching trench in a substrate forming bars, forming first insulating layer on the base of the trench and on the upper sides and on the side walls of the bars and further processing

Daniel Köhler; Dirk Manger; Martin Popp; Till Schlösser; Michael Sesterhenn

Archive | 2003

Herstellungsverfahren für einen Grabenkondensator mit einem Isolationskragen, der über einen vergrabenen Kontakt einseitig mit einem Substrat elektrisch verbunden ist, insbesondere für eine Halbleiterspeicherzelle

Thomas Hecht; Till Schloesser; Michael Sesterhenn

Archive | 2003

Herstellungsverfahren für einen Grabenkondensator mit einem Isolationskragen, der über einen vergrabenen Kontakt einseitig mit einem Substrat elektrisch verbunden ist, insbesondere für eine Halbleiterspeicherzelle Manufacturing method for a grave capacitor with an insulation collar, which is electrically connected through a buried contact on one side with a substrate, in particular for a semiconductor memory cell

Thomas Hecht; Till Schloesser; Michael Sesterhenn

Archive | 2003

Production of a semiconductor structure used as a DRAM memory cell comprises forming a first barrier layer in a lower trench region in a trench in a substrate and filling with a first filler, and further processing

Michael Sesterhenn; Stefan Slesazeck

Archive | 2003

Herstellungsverfahren für eine Halbleiterstruktur mit einem Streifen (Buried Strap) in einem Substrat, der einen vergrabenen, leitenden Kontakt ausbildet, welcher einseitig mit dem Substrat elektrisch verbundenen ist Manufacturing method of a semiconductor structure with a strip (Buried Strap) in a substrate, which forms a buried conductive contact which is electrically connected to the substrate on one side

Michael Sesterhenn; Stefan Slesazeck

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Till Schlösser

Infineon Technologies

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Dirk Manger

Qimonda

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Martin Popp

Qimonda

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Thomas Hecht

Infineon Technologies

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Stefan Slesazeck

Infineon Technologies

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Till Schloesser

Infineon Technologies

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Daniel Köhler

Infineon Technologies

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Johann Steinmetz

Infineon Technologies

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Stefan Tegen

Infineon Technologies

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Stephan Wege

Infineon Technologies

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