Thomas Hecht

Crystallization behavior of thin ALD-Al2O3 films

Abstract Integration of materials with a high dielectric constant into storage or gate capacitor applications requires a detailed understanding of the crystallization behavior. The dependence of crystallinity on annealing temperature and time was studied for thin atomic-layer-deposited (ALD) Al 2 O 3 films of varying thickness, using grazing-incidence X-ray diffraction. The correlation between dielectric constant and annealing condition was investigated and an increase in dielectric constant due to annealing was observed.

A comparative study of dielectric relaxation losses in alternative dielectrics

This work is intended to draw attention to the effect of dielectric relaxation which is shown to severely influence the performance of alternative dielectrics in DRAM storage capacitors as well as of the gate dielectrics of MOSFETs. A comparison of the dielectric relaxation losses in standard insulators with those in most proposed high K dielectrics is presented.

Physical characterization of thin ALD–Al2O3 films

Abstract Aluminum oxide was deposited using atomic layer deposition on either a silicon oxide or a silicon nitride interface. Water vapor or ozone were used as oxidation precursors. The structural properties of these films were investigated by time-of-flight secondary-ion-mass-spectroscopy (ToF-SIMS), X-ray photoelectron spectroscopy (XPS) and elastic recoil detection (ERD). Special attention was given to contamination issues of the film and the interface, bonding conditions and temperature influence on diffusion. The results suggest that the silicon most likely diffused along grain boundaries of polycrystalline Al2O3. Carbon and hydrogen were located at the interface and furthermore hydrogen diffused out of the film to some extent due to anneal. Carbon content in the layer was reduced when using O3 as an oxidant. The formation of metallic aluminum clusters was not observed for any of the investigated process conditions.

Capacitance enhancement techniques for sub-100 nm trench DRAMs

Essential techniques that allow further scaling of trench DRAMs beyond 100 nm have been developed. Al/sub 2/O/sub 3/ was implemented as a high-k node dielectric in silicon-insulator-silicon trench capacitors. Al/sub 2/O/sub 3/ films were deposited by ALD with excellent step coverage at aspect ratios of up to AR/spl ap/60. Even after thermal stressing at 1050/spl deg/C an effective oxide thickness (=capacitance equivalent thickness) of t/sub ox/=3.6 nm and a leakage current of well below 1 fA/cell were obtained. Both selective and non-selective HSG Si was formed inside high-aspect ratio straight and bottled trenches. On fully integrated 0.17 /spl mu/m trench DRAMs, a storage capacitance of 45 fF/cell with acceptable leakage current was achieved. Both the aluminum oxide node dielectric and the HSG silicon have thus been proven to withstand the high thermal budget required for integration into trench DRAMs. In addition, a silicon etch process was developed that allows trench aspect ratios of AR/spl ap/60 at critical dimensions of CD=80 nm.

A fully integrated Al 2 O 3 trench capacitor DRAM for sub-100 nm technology

For the first time, fully integrated 128 Mb trench DRAMs using Al/sub 2/O/sub 3/ as high-k node dielectric in silicon-insulator-silicon (SIS) capacitors were successfully fabricated. A highly manufacturable integration scheme for Al/sub 2/O/sub 3/ as node dielectric in trench capacitors was developed and successfully implemented in a 170 nm ground rule technology. A capacitance close to 50 fF/cell with leakage current well below 1 fA/cell was achieved, leading to significantly improved retention characteristics. 128 Mb DRAM devices with full functionality and excellent test yields were obtained. The scalability of this technology to smaller dimensions is demonstrated by the integration of ALD (Atomic Layer Deposition) Al/sub 2/O/sub 3/ into 110 nm ground rule trench capacitors. In addition, trench capacitors with Al/sub 2/O/sub 3/ on hemispherical grain (HSG) silicon were fabricated, exhibiting high capacitance enhancement with low leakage current.

Inline-Characterization and Step Coverage Optimization of Deposited Dielectrics in DRAM Structures

A combination of a common ellipsometric thickness determination from a plane surface and volume-related information gained from a Fourier transform infrared measurement enables monitoring of thin nm-scale layers in 3-D structures. This method was established to characterize dielectric layers deposited by atomic layer deposition within a capacitor structure of a 65-nm DRAM technology. The influence of precursor flow and pulse time on the overall homogeneity and step coverage of zirconium aluminum oxide was investigated. A clear correlation to the precursor amount and the geometry of the deposition tool can be shown.

A model for Al/sub 2/O/sub 3/ ALD conformity and deposition rate from oxygen precursor reactivity

The atomic layer deposition of alumina using TMA (trimethyl-aluminum) and O/sub 3/, O (atomic oxygen), or H/sub 2/O into high aspect ratio trenches is investigated. We determine the activation energy of the initial adsorption step by ab initio calculations and derive an effective sticking coefficient. We show that this quantity essentially determines the film conformity and deposition rate of self limiting ALD processes. Implementing this effective model into a custom feature scale simulator, coupled to a fluid dynamical reactor simulator, a consistent description of ALD on atomistic, feature, and reactor scale is obtained. With this multi scale approach it is possible for the first time to simulate film profile evolution during dielectric ALD into high aspect ratio trenches for future DRAM generations.

Optical characterization of three-dimensional structures within a DRAM capacitor

As an alternative to completely destructive and mostly very time consuming methods non-intrusive and non-destructive Fourier Transform Infrared Spectroscopy has been chosen to enable an inline characterization chain for DRAM manufacturing. This characterization chain comprises the mold oxide etch profile and the step coverage control of high-k deposition. In our case Zirconium Aluminum Oxide deposited by Atomic Layer Deposition was used as high-k dielectric. The characterization of the different process steps was carried out by either absorption parameters based on molecule vibrations or optical path differences calculated from oscillations in the infrared spectra. For the last issue of successfully characterizing the step coverage of high-k deposition, a combination of two independent optical measurements was established. Therefore a volume related FTIR measurement in a DRAM array and an ellipsometric thickness determination of a 2-dimensional layer in a support area were combined. This method showed both, the deposition parameter dependence, like pulse time, precursor flow and deposition temperature as well as tool geometry dependence on the step coverage behavior. By the use of 300 mm mapping techniques a full characterization including spatial maps over the whole 300 mm wafers was possible.