Min Sang Park

A Study of Strain Engineering Using CESL Stressor on Reliability Comparing Effect of Intrinsic Mechanical Stress

The effects of a stressor nitride layer on device performance and reliability are investigated. To decouple intrinsic mechanical stress and process-related effects, device characteristics under mechanical-bending stress and stressor layers were compared. The compressive-stressor device exhibits improved initial interface quality, although slightly degraded reliability characteristics, due to an increased hydrogen passivation of the dielectric/substrate interface. Thereby, the hydrogen passivation in the interface is found to be the primary cause of the difference in reliability characteristics.

Analysis of Abnormal Upturns in Capacitance–Voltage Characteristics for MOS Devices With High-

In this letter, we analyze the nonsaturating upturns of capacitance under strong accumulation bias in MOS capacitors with high-k dielectrics. By comparing the electrical properties of dielectric samples with and without HfO2 and by varying the ambient temperature, it is found that the conduction through the shallow trap levels in the HfO2 bulk produces not only a steady-state current but also a dynamic current, which, in turn, causes the upturn in capacitance. The addition of RC shunts to the conventional small-signal model is proposed to consider the dynamic leakage effect. The models effectiveness is verified by fitting the measured impedance spectrum and the measured capacitance. We suggest that measuring at a high frequency of hundreds of megahertz eliminates the dynamic interaction by shallow trap levels, allowing gate capacitance to be successfully reconstructed.

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Hot carrier effects on RF small-signal parameters in high-k/metal gate nMOSFETs are characterized by DC and RF measurements. To explain the novel hot carrier-induced degradation, we suggest a modified surface channel resistance model that can be applied to both conventional SiO2 and high-k nMOSFETs.

Dielectrics

We present a comparative study of the effects of a Si capping layer on SiGe channel pMOSFETs used for radio-frequency (RF) applications. In Si-capped devices, the drive current increases because Si/SiGe heterojunction layers form a SiGe quantum well, which reduces carrier scattering. Conversely, SiGe samples without a Si capping layer suffer severe interface degradation, due to Ge diffusing into the gate dielectric. Devices using a Si capping layer have enhanced RF performance and reduced low-frequency noise, which is a key factor affecting phase noise. There is an increase in the RF figures of merit. These benefits indicate that a Si capping layer should be used in SiGe channel pMOSFETs.

New investigation of hot carrier degradation of RF small-signal parameters in high-k/metal gate nMOSFETs

We have investigated reliability characteristics for a high-k/metal gate MOSFET with strain engineering under constant voltage stress (CVS). Using contact edge stop layer (CESL), tensile and compressive strains are applied to the channel region. Since the compressive MOSFET has more hydrogen in the CESL, the MOSFET has lower reliability characteristics than others. Though the hydrogen can passivate dangling bonds in the high-k dielectric, the passivated bonds are easily broken by voltage stress, which cause degradation of high-k layer.

The Effect of a Si Capping Layer on RF Characteristics of High-

We investigate the low-frequency noise characteristics of HfSiON/metal gate nMOSFETs with and without La-doping and report new findings on the impact of La-doping on low-frequency noise of the nMOSFETs. The La-doped devices show lower noise intensity than the un-doped devices and it is attributed to the reduced trap density (Nt) and tunneling attenuation length (λ) caused by the La-doping. In the case of submicron devices, however, the La-doped devices show additional mobility-fluctuation noise at low-field condition and the additional noise intensity increases as the gate length decreases. These results indicate that the advantage of low noise of La-doping technique can decrease or even disappear in case of short-channel devices used for analog applications.

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We present the reliabilities in compressively strained SiGe channel pMOSFETs. A Si capping layer in SiGe channel pMOSFETs improved the negative bias temperature instability (NBTI) without device performance degradation. Also, the Si capped device exhibits the better NBTI reliability than the Si channel device. Because a Si capped structure forms the double barrier layer in the interface, it is the primary cause of improved NBTI. These results show that a Si capping layer should be used in SiGe channel pMOSFETs for better reliabilities and performance.

/Metal Gate SiGe Channel pMOSFETs

This paper presents a simple equivalent circuit model to characterize a gate impedance of MOS capacitor with high-k dielectric, which exhibited significant dynamic leakage. Series of RC-shunts was added to consider the effects of charge trapping in high-k dielectric. From our model, it is found that two-frequency method using the megahertz range gives us reasonable values for the gate capacitance because the traps with large time constants are unable to response the modulating frequency. Also, parameters for our model are systematically analyzed.

Reliability of HFO 2 /SIO 2 dielectric with strain engineering using CESL stressor

We present high pressure hydrogen annel (HPHA) effects in two types contact etch stop layer (CESL) nitride MOSFETs. Performances increased in both samples of using rapid thermal chemical vapor deposition (RTCVD) and plasma enhanced chemical vapor deposition (PECVD) nitride stress layers, but reliability only degraded in PECVD samples after HPHA.

Low-frequency noise behavior of La-doped HfSiON/metal gate nMOSFETs

Effects of high pressure hydrogen annealing (HPHA) process on a nitride contact etch stop layer (CESL) MOSFETs is studied. High interface quality by HPHA leads to improved on-current (Ion) and transconductance (Gm) while reliability degradation is acceptable.