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Dive into the research topics where Minoru Ida is active.

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Featured researches published by Minoru Ida.


IEEE Transactions on Microwave Theory and Techniques | 1982

A MESFET Variable-Capacitance Model for GaAs Integrated Circuit Simulation

Tatsuo Takada; Yokoyama; Kiyoyuki; Minoru Ida; Toshio Sudo

A simple MESFET capacitance model which has a clearly explained physical meaning for a wide bias voltage range has been developed for use in simulations of GaAs integrated circuits. In this model, gate-source, gate-drain capacitances are represented by analytical expressions which are classified into three different regions for bias voltages: a before-pinch-off region including the neighborhood of the built-in voltage, an after-pinch-off region, a transition region. 2-dimensional analysis results support the validity of the analytically derived capacitance model. The model is applicable to MESFETs used in integrated circuits that have low donor-thickness product.


IEEE Electron Device Letters | 2002

Over 300 GHz f/sub T/ and f/sub max/ InP/InGaAs double heterojunction bipolar transistors with a thin pseudomorphic base

Minoru Ida; Kenji Kurishima; Noriyuki Watanabe

Describes 150-nm-thick collector InP-based double heterojunction bipolar transistors with two types of thin pseudomorphic bases for achieving high f/sub T/ and f/sub max/. The collector current blocking is suppressed by the compositionally step-graded collector structure even at J/sub C/ of over 1000 kA/cm/sup 2/ with practical breakdown characteristics. An HBT with a 20-nm-thick base achieves a record f/sub T/ of 351 GHz at high J/sub C/ of 667 kA/cm/sup 2/, and a 30-nm-base HBT achieves a high value of 329 GHz for both f/sub T/ and f/sub max/. An equivalent circuit analysis suggests that the extremely small carrier-transit-delay contributes to the ultrahigh f/sub T/.


international electron devices meeting | 2000

Undoped-emitter InP/InGaAs HBTs for high-speed and low-power applications

Minoru Ida; K. Kurishima; H. Nakajima; N. Watanabe; S. Yamahata

Scaling down the lateral emitter dimension is an effective way to reduce the power dissipation of HBT ICs. Various authors have demonstrated submicrometer HBTs operating at >100 GHz with submilliampere current. On the other hand, there have been few reports on vertical layer structures optimized for low-current operation. At low current, the dominant delay time of HBTs is the emitter charging time. Thus, it is essential to reduce the emitter junction capacitance by increasing the thickness of the emitter depletion layer. In this paper, we propose an undoped-emitter structure for InP-based HBTs and investigate its impact on low-power applications.


IEEE Photonics Technology Letters | 2005

60-GHz bidirectional radio-on-fiber links based on InP-InGaAs HPT optoelectronic mixers

Chang-Soon Choi; Jun-Hyuk Seo; Woo-Young Choi; Hideki Kamitsuna; Minoru Ida; Kenji Kurishima

We demonstrate 60-GHz band bidirectional radio-on-fiber (RoF) links based on InP-InGaAs heterojunction phototransistor (HPT) optoelectronic mixers. They employ remote up/down conversion scheme with optical local oscillator signals distributed from the central office and intermediate frequency (IF) fiber transmission for both up- and down-links. Since frequency up/down conversions and photodetection are carried out by a single HPT optoelectronic mixer, base station architecture is greatly simplified. In order to validate its feasibility, both up- and down-link RoF transmissions of 16 quadrature amplitude modulator data are successfully demonstrated at 60-GHz band using 1.25-GHz IF for down-link and 2.0-GHz IF for up-link.


IEEE Transactions on Electron Devices | 2010

High-Speed and High-Reliability InP-Based HBTs With a Novel Emitter

Norihide Kashio; Kenji Kurishima; Yoshino K. Fukai; Minoru Ida; Shoji Yamahata

This paper describes InP HBTs with a novel emitter simply consisting of a degenerately doped n+-InGaAs layer and an undoped InP thin layer. An n+-InP layer is not necessary because the quasi-Femi level in the n+-InGaAs layer is high enough to exceed the conduction band discontinuity between the n+ -InGaAs layer and the undoped InP layer. In the proposed structure, a thin ( ~ 10 nm) ledge structure can easily be fabricated by etching the n+-InGaAs layer. The fabricated HBTs with a 15-nm-thick ledge structure provide a high collector current density of over 6 mA/¿m2 . There is almost no degradation of current gain, although the emitter width is reduced to as small as 0.5 ¿m. The HBTs also exhibit an ft of 324 GHz at a collector current density of 5.5 mA/¿m2, which is comparable with that of HBTs with a conventional emitter consisting of an n+ -InGaAs layer, an n+-InP layer, and an n-InP layer. From the results of accelerated life tests, the activation energy of the degradation in HBTs is estimated to be around 1.8 eV, and the extrapolated mean time to failure is estimated to be over 108 h at a junction temperature of 125°C.


international microwave symposium | 2004

A 24-Gsps 3-bit Nyquist ADC using InP HBTs for electronic dispersion compensation

Hideyuki Nosaka; Makoto Nakamura; Minoru Ida; Kenji Kurishima; Tsugumichi Shibata; Masami Tokumitsu; Masahiro Muraguchi

A 3-bit flash analog-to-digital converter (ADC) for electronic dispersion compensation (EDC) was developed using InP HBTs. Nyquist operation was developed using InP HBT. Nyquist operation was confirmed up to 24 Gsps, which enables oversampling acquisition for 10 Gbits/s nonreturn-to-zero (NRZ) signals. The ADC can also be operated at up to 37 Gsps for low input frequencies. To reduce aperture jitter and achieve a wideband of over 7 GHz, an analog input signal for all latched comparators are provided as travelling waves through coplanar transmission lines.


25th Annual Technical Digest 2003. IEEE Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 2003. | 2003

High-speed InP/InGaAs DHBTs with a thin pseudomorphic base

Minoru Ida; Kenji Kurishima; Kiyoshi Ishii; Noriyuki Watanabe

We describe thin collector InP-based double heterojunction bipolar transistors with a thin pseudomorphic base for achieving high f/sub T/ and f/sub max/. Over-300-GHz f/sub T/ and f/sub max/ are obtained with high uniformity across a 3-inch wafer. We demonstrate an ECL gate delay of 3.48 ps/stage in a 19-stage ring-oscillator using the technology. To our knowledge, this is the first report of sub-4-ps ECL gate delay, Moreover, a record f/sub max/ in mesa HBTs of 492 GHz is also demonstrated by a further lateral scaling of DHBTs.


IEEE Journal of Selected Topics in Quantum Electronics | 2004

A 43-Gb/s clock and data recovery OEIC integrating an InP-InGaAs HPT oscillator with an HBT decision circuit

Hideki Kamitsuna; Kiyoshi Ishii; Tsugumichi Shibata; Kenji Kurishima; Minoru Ida

This paper presents a 43-Gb/s clock and data recovery (CDR) optoelectronic integrated circuit (OEIC) that consists of a 43-GHz heterojunction phototransistor (HPT) oscillator as an optoelectronic clock recovery circuit and a 40-Gb/s-class heterojunction bipolar transistor (HBT) decision circuit. The layer and fabrication process of the HPT and HBT are fully compatible, and the HPT has a photocoupling window in the emitter electrode for optical access from the top. When the HPT is directly illuminated, the HPT oscillator successfully extracts a 43-GHz electrical clock signal from a 43-Gb/s optical data stream by itself. The OEIC regenerates the data signal input into the HBT decision circuit by using the electrical clock signal optoelectronically extracted by the HPT oscillator. The CDR OEIC achieves error-free operation for a 2/sup 31/-1 PRBS data signal. The power dissipation of the OEIC is only 0.79 W, which is less than half that of a fully electrical 40-Gb/s-class CDR IC. This is the first successful demonstration of HPT-based OEICs integrated with HBT digital circuits operating at such a high bit rate.


25th Annual Technical Digest 2003. IEEE Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 2003. | 2003

A 150-GHz dynamic frequency divider using InP/InGaAs DHBTs

Satoshi Tsunashima; Koichi Murata; Minoru Ida; Kenji Kurishima; Toshihiko Kosugi; Takatomo Enoki; Hirohiko Sugahara

An ultrahigh-speed frequency divider IC using InP/InGaAs DHBTs was developed. A clocked-inverter feed-forward toggle flip-flop is employed in the IC. The maximum measurement frequency of the IC is 150 GHz. To the best of our knowledge, the operating frequency is fastest frequency divider so far reported.


IEEE Transactions on Microwave Theory and Techniques | 2002

Direct optical injection locking of InP/InGaAs HPT oscillator ICs for microwave photonics and 40-Gbit/s-class, optoelectronic clock recovery

Hideki Kamitsuna; Tsugumichi Shibata; Kenji Kurishima; Minoru Ida

Presents fully monolithically integrated 10- and 39-GHz-band InP/InGaAs heterojunction phototransistor (HPT) oscillators that can be optically injection locked by directly illuminating the HPT. When optical signals are modulated by fundamental frequencies around free-running oscillations, the 10-GHz-band HPT oscillator integrated circuit (IC) achieves an ultra-wide locking range of 1401 MHz (relative bandwidth of 13.6%), and the 39-GHz-band HPT oscillator IC achieves a wide locking range of 768 MHz, which are records among the indirect and/or direct optical injection-locked oscillators reported to date. The 10-GHz-band HPT oscillator IC also achieves very wide locking ranges of 618 and 160 MHz for third and fifth subharmonic modulated optical signal injection, respectively, which is very useful for microwave photonics applications. Optoelectronic clock recovery for optical transmission systems was tested by using the 39-GHz-band HPT oscillator IC and a planar lightwave circuit Mach-Zehnder interferometer. A 38.8-GHz electrical clock signal was successfully extracted from 38.8-Gbit/s nonreturn-to-zero optical data streams.

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Kenji Kurishima

Nippon Telegraph and Telephone

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Hideyuki Nosaka

Nippon Telegraph and Telephone

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Norihide Kashio

Nippon Telegraph and Telephone

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Tsugumichi Shibata

Nippon Telegraph and Telephone

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Kimikazu Sano

Nippon Telegraph and Telephone

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Kiyoshi Ishii

Nippon Telegraph and Telephone

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Shoji Yamahata

Nippon Telegraph and Telephone

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Hideki Kamitsuna

Nippon Telegraph and Telephone

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T. Enoki

Nippon Telegraph and Telephone

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