Minseo Kim

14.1 A 126.1mW real-time natural UI/UX processor with embedded deep-learning core for low-power smart glasses

This paper presents a low-power natural UI/UX processor with an embedded deep-learning core (NINEX) to provide wearable AR for HMD users without calibration. A low-power and real-time natural UI/UX processor is fabricated using 65nm 8-metal CMOS technology, integrating 4.8M equivalent gates and 390KB SRAM for wearable AR. It consumes 126.1mW at 200 MHz, 1.2V. The NINEX handles the overall HMD UI/UX functionality (from pre-processing to graphics) and achieves 56.5% higher power efficiency vs. the latest HMD processor. It achieves 68.1% higher power efficiency and -2% higher gesture and speech recognition accuracy over a best-in-class pattern recognition processor.

21.1 A 79pJ/b 80Mb/s full-duplex transceiver and a 42.5μW 100kb/s super-regenerative transceiver for body channel communication

Recently, smart phones or head-mounted displays enables high definition (HD) video streaming and image data to be shared with friends while wearable smart sensors continuously monitor and send users physiological information to a smart watch. Body channel communication (BCC), which uses the human body as the communication channel [1], has demonstrated better human-friendly interface and energy-efficient performance compared with air channel communication. However, most of the previous BCC research used only the frequency band below 100MHz and were only focused on either low data rate (<;10Mb/s) healthcare applications [2-5] or high data rate (60Mb/s) multimedia data transfer [6]. Its available channel bandwidth was limited <; 100MHz and the interference from FM radio due to body antenna effect had a significant effect on its performance. Moreover, [6] did not support full duplex communication so that the user interaction with wearable devices was not possible in live video streaming or real-time VR game applications.

Quantitative Analysis of Artists’ Characteristic Styles through Biologically-Motivated Image Processing Techniques: Uncovering a Mentor to Johannes Vermeer

This study was designed to improve the limitations of traditional analysis of artworks by quantitatively analyzing artworks through biologically-motivated image processing techniques that reflect visual information processing mechanisms of human vision. As the first step to achieve this goal, this study addressed one of the important questions in art history, uncovering a mentor for ‘an artist who remains forever unknown’ Johannes Vermeer, by adopting three interdisciplinary research methods of cognitive science, art history, and engineering. We performed orientation, radial frequency, and color analyses with the artworks for comparing the artistic styles of Vermeer and other artists who have been presumed to be his mentor. The results from three analyses have led us to the conclusion that a person who had the strongest influence on Vermeer is Gerard Ter Borch. This conclusion was strongly confirmed by verifying the research methods with an additional comparison of artistic styles between Rembrandt and Carel Fabritius, whose master-pupil relationship has already been revealed. This study is believed to provide a new perspective on uncovering previously unknown mentor of Vermeer, and the research methods adopted here can be applied to other related research issues in art history, such as authenticity debates on masterpieces, by quantitatively archiving artists’ characteristic styles.

A 82nW chaotic-map true random number generator based on sub-ranging SAR ADC

An ultra-low power true random number generator (TRNG) based on sub-ranging SAR ADC is proposed. The proposed TRNG shares the coarse-ADC circuit with sub-ranging SAR ADC for area reduction. The shared coarse-ADC not only plays the role of discrete-time chaotic circuit or TRNGs entropy source but also reduces overall SAR ADC energy consumption by selectively activating the fine-SAR ADC. Also, the proposed dynamic residue amplifier and adaptive-reset comparator generate chaotic map with low power consumption. TRNG core occupies 0.0045mm2 in 0.18μm CMOS technology and consumes 82nW at 270kbps throughput with 0.6V supply. The proposed TRNG passes all NIST tests and it achieves a state-of-the-art FOM of 0.3pJ/bit.

Differential floating mass type vibration transducer for MEI system

A new of vibration transducer, a DFMT (differential floating mass type) is introduced for use in an MEI (middle ear implant) system. The DFMT transducer is not influenced by external noise magnetic flux and has a very high vibration efficiency because its two magnets, which are glued back to back with the same poles facing, are located in the coil.

A 24-mW 28-Gb/s wireline receiver with low-frequency equalizing CTLE and 2-tap speculative DFE

In this paper, a power-efficient equalization techniques is proposed for a high data-rate multi-standard wireline receiver. First, a low-frequency-equalizing continuous-time linear equalizer (LFE-CTLE) compensates for not only the short-term inter-symbol interference (ISI) from high-frequency channel loss but also the long-term ISI from the low-frequency channel loss without additional power consumption compared to the previous CTLE. LFE-CTLE can reduce the required number of taps and power consumption of the following decision feedback equalizer (DFE). A 2-tap speculative DFE adopts 4-phase clocking techniques to reduce the number of summation nodes and latches for low-power consumption. The proposed receiver is designed in 65-nm LP CMOS technology with 1.-2V supply voltage. It can achieve 28-Gb/s data rate with a 24-mW power efficiency.

A 82-nW Chaotic Map True Random Number Generator Based on a Sub-Ranging SAR ADC

An ultra-low power true random number generator (TRNG) based on a sub-ranging SAR analog-to-digital converter (ADC) is proposed. The proposed TRNG is composed of a coarse-SAR ADC with a low-power adaptive-reset comparator and a low-power dynamic amplifier. The coarse-ADC part is shared with a sub-ranging SAR ADC for area reduction. The shared coarse-ADC not only plays the role of discrete-time chaotic circuit but also reduces the overall SAR ADC energy consumption by selectively activating the fine-SAR ADC. Also, the proposed dynamic residue amplifier consumes only 48 nW and the adaptive-reset comparator generates a chaotic map with only 6-nW consumption. The proposed TRNG core occupies 0.0045 mm2 in 0.18-

27.2 A 25.2mW EEG-NIRS multimodal SoC for accurate anesthesia depth monitoring

\mu \text{m}

21.2 A 1.4mΩ-sensitivity 94dB-dynamic-range electrical impedance tomography SoC and 48-channel Hub SoC for 3D lung ventilation monitoring system

CMOS technology and consumes 82 nW at 270-kbps throughput with 0.6-V supply. It successfully passes all of National Institute of Standards and Technology (NIST) tests, and it achieves the state-of-the-art figure-of-merit of 0.3 pJ/bit.

An adaptive DC-balanced and multi-mode stimulator IC with 1GΩ output impedance for compact electro-acupuncture system

There has been recent research into continuous monitoring of the quantitative anesthesia (ANES) depth level for safe surgery [1]. However, the current ANES depth monitoring approach, bispectral index (BIS) [3], uses only EEG from the frontal lobe, and it shows critical limitations in the monitoring of ANES depth such as signal distortion due to electrocautery, EMG and dried gel, and false response to the special types of anesthetic drugs [3]. Near-infrared spectroscopy (NIRS) is complementary to EEG [2], and can not only compensate for the distorted depth level, but also assess the effects of various anesthetic drugs. In spite of its importance, a unified ANES monitoring system using EEG/NIRS together has not been reported because NIRS signals have widely different dynamic ranges (10pA to 10nA), and also signal level variations from person to person and environment are not manageable without closed-loop control (CLC).