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Featured researches published by Yongsu Lee.


international solid-state circuits conference | 2014

18.4 A 4.9mΩ-sensitivity mobile electrical impedance tomography IC for early breast-cancer detection system

Sunjoo Hong; Kwonjoon Lee; Unsoo Ha; Hyunki Kim; Yongsu Lee; Youchang Kim; Hoi-Jun Yoo

A mobile electrical impedance tomography (EIT) IC is proposed for early breast cancer detection personally at home. To assemble the entire system into a simple brassiere shape, EIT IC is integrated via a multi-layered fabric circuit board which includes 90 EIT electrodes and two reference electrodes for current stimulation and voltage sensing. The IC supports three operating modes; gain scanning, contact impedance monitoring, and EIT modes for the clear EIT image. A differential sinusoidal current stimulator (DSCS) is proposed for injection of low-distortion programmable current which has harmonics less than -59 dBc at a load impedance of 2 kΩ. To get high sensitivity, a 6-channel voltage sensing amplifier can adaptively control the gain up to a maximum of 60 dB, and has low input referred noise, 36 nV/ √Hz. The 2.5 × 5 mm chip is fabricated in a 0.18 μm 1P6M CMOS process and consumes 53.4 mW on average. As a result, a sensitivity of 4.9 mΩ is achieved which enables the detection of a 5 mm cancer mass within an agar test phantom.


IEEE Transactions on Biomedical Circuits and Systems | 2015

A Wearable EEG-HEG-HRV Multimodal System With Simultaneous Monitoring of tES for Mental Health Management

Unsoo Ha; Yongsu Lee; Hyunki Kim; Taehwan Roh; Joonsung Bae; Chang-Hyeon Kim; Hoi-Jun Yoo

A multimodal mental management system in the shape of the wearable headband and earplugs is proposed to monitor electroencephalography (EEG), hemoencephalography (HEG) and heart rate variability (HRV) for accurate mental health monitoring. It enables simultaneous transcranial electrical stimulation (tES) together with real-time monitoring. The total weight of the proposed system is less than 200 g. The multi-loop low-noise amplifier (MLLNA) achieves over 130 dB CMRR for EEG sensing and the capacitive correlated-double sampling transimpedance amplifier (CCTIA) has low-noise characteristics for HEG and HRV sensing. Measured three-physiology domains such as neural, vascular and autonomic domain signals are combined with canonical correlation analysis (CCA) and temporal kernel canonical correlation analysis (tkCCA) algorithm to find the neural-vascular-autonomic coupling. It supports highly accurate classification with the 19% maximum improvement with multimodal monitoring. For the multi-channel stimulation functionality, after-effects maximization monitoring and sympathetic nerve disorder monitoring, the stimulator is designed as reconfigurable. The 3.37 × 2.25 mm 2 chip has 2-channel EEG sensor front-end, 2-channel NIRS sensor front-end, NIRS current driver to drive dual-wavelength VCSEL and 6-b DAC current source for tES mode. It dissipates 24 mW with 2 mA stimulation current and 5 mA NIRS driver current.


international solid-state circuits conference | 2016

14.3 A 0.55V 1.1mW artificial-intelligence processor with PVT compensation for micro robots

Youchang Kim; Dongjoo Shin; Jinsu Lee; Yongsu Lee; Hoi-Jun Yoo

Micro robots with artificial intelligence (AI) are being investigated for many applications, such as unmanned delivery services. The robots have enhanced controllers that realize AI functions, such as perception (information extraction) and cognition (decision making). Historically, controllers have been based on general-purpose CPUs, and only recently, a few perception SoCs have been reported. SoCs with cognition capability have not been reported thus far, even though cognition is a key AI function in micro robots for decision making, especially autonomous drones. Path planning and obstacle avoidance require more than 10,000 searches within 50ms for a fast response, but a software implementation running on a Cortex-M3 takes ~5s to make decisions. Micro robots require 10× lower power and 100× faster decision making than conventional robots because of their fast movement in the environment, small form factor, and limited battery capacity. Therefore, an ultra-low-power high-performance artificial-intelligence processor (AIP) is necessary for micro robots to make fast and smart maneuvers in dynamic environments filled with obstacles.


european solid state circuits conference | 2016

A 82nW chaotic-map true random number generator based on sub-ranging SAR ADC

Minseo Kim; Unsoo Ha; Yongsu Lee; Kyuho Jason Lee; Hoi-Jun Yoo

An ultra-low power true random number generator (TRNG) based on sub-ranging SAR ADC is proposed. The proposed TRNG shares the coarse-ADC circuit with sub-ranging SAR ADC for area reduction. The shared coarse-ADC not only plays the role of discrete-time chaotic circuit or TRNGs entropy source but also reduces overall SAR ADC energy consumption by selectively activating the fine-SAR ADC. Also, the proposed dynamic residue amplifier and adaptive-reset comparator generate chaotic map with low power consumption. TRNG core occupies 0.0045mm2 in 0.18μm CMOS technology and consumes 82nW at 270kbps throughput with 0.6V supply. The proposed TRNG passes all NIST tests and it achieves a state-of-the-art FOM of 0.3pJ/bit.


symposium on vlsi circuits | 2015

A 4.84mW 30fps dual frequency division multiplexing electrical impedance tomography SoC for lung ventilation monitoring system

Yongsu Lee; Kiseok Song; Hoi-Jun Yoo

Lung ventilation monitoring electrical impedance tomography (EIT) SoC is implemented in 0.18μm CMOS technology. A dual frequency division multiplexing (DFDM) method is proposed to extract accurate lung ventilation. To realize the DFDM, the proposed EIT SoC adopts a dual frequency current generator (DFCG) and a dual frequency read-out front-end (DFRF) to process the two frequencies in one channel at once. Consequently, 65.1% of power consumption and 71.5% of area are reduced in each channel. In the DFCG, dynamic element matching (DEM) and adaptive quantization (AQ) techniques are adopted to achieve -46dBc total harmonic distortion. In the DFRF, a weaver demodulator (WD) and a trimmed notch filter combined with low-pass filter (TN-LPF) reduce the settling time of the sensor front-end by 83.3% (0.17ms) to achieve the 30fps real-time operation with 32 electrodes. The proposed EIT SoC is successfully verified by both in-vitro and in-vivo test and achieved 95.35% accuracy.


international symposium on circuits and systems | 2015

A 0.54-mW duty controlled RSSI with current reusing technique for human body communication

Jaeeun Jang; Yongsu Lee; Hyunwoo Cho; Hoi-Jun Yoo

A low power adaptive controlled current-reusing received signal strength indicator (RSSI) is proposed for the human body communication (HBC). The proposed RSSI has three low power features. First, the power on controller (PoC) scheme is proposed to achieve the duty control of the RSSI. It significantly reduces the average power consumption of RSSI over 90%. Second, the current stacking scheme is adopted to share both eight rectifiers and eight amplifiers, composing the RSSI. By the current reusing technique, the power consumption of the RSSI is reduced to 45%. In addition, the reconfigurable LNA is used in the front-end of HBC TRX. The RSSI adaptively controls the gain and noise figure of the LNA to optimize the power consumption. The proposed RSSI occupies 0.85mm2 in 0.18-μm CMOS technology.


international symposium on circuits and systems | 2014

3.8 mW electrocardiogram (ECG) filtered electrical impedance tomography IC using I/Q homodyne architecture for breast cancer diagnosis

Yongsu Lee; Unsoo Ha; Kiseok Song; Hoi-Jun Yoo

A low-power electrical impedance tomography (EIT) IC proposed for breast cancer diagnosis is implemented in 180nm CMOS process. For the breast cancer diagnosis, low power and high accuracy is required. The proposed IC reduces the power consumption to 3.8mW using the homodyne conversion mixer to lower the sampling rate of ADC. To gain high accuracy, the adaptive filter using the miller capacitor perfectly filters out the ECG signal. I/Q dual path architecture measures conductivity and permittivity components separately, so distance errors are reduced about 86% in simulation.


international solid-state circuits conference | 2015

21.9 A wearable EEG-HEG-HRV multimodal system with real-time tES monitoring for mental health management

Unsoo Ha; Yongsu Lee; Hyunki Kim; Taehwan Roh; Joonsung Bae; Chang-Hyeon Kim; Hoi-Jun Yoo

Recently, wearable mental health management systems have been actively studied based on EEG monitoring and transcranial electrical stimulation (tES) [1]. It was reported that mental activities cause neural, vascular and autonomie domain changes in the human brain [2]. However, the previous neurofeedback system [1] used only neural domain information with low spatial resolution (~10cm) EEG signals. Furthermore, EEG signals are easily interfered by tES stimulation signal, eye-blinking and EMG signals so that it is difficult to monitor in real-time during stimulation and to avoid electromagnetic noise for accurate mental health classification.


IEEE Journal of Solid-state Circuits | 2017

A 82-nW Chaotic Map True Random Number Generator Based on a Sub-Ranging SAR ADC

Minseo Kim; Unsoo Ha; Kyuho Jason Lee; Yongsu Lee; Hoi-Jun Yoo

An ultra-low power true random number generator (TRNG) based on a sub-ranging SAR analog-to-digital converter (ADC) is proposed. The proposed TRNG is composed of a coarse-SAR ADC with a low-power adaptive-reset comparator and a low-power dynamic amplifier. The coarse-ADC part is shared with a sub-ranging SAR ADC for area reduction. The shared coarse-ADC not only plays the role of discrete-time chaotic circuit but also reduces the overall SAR ADC energy consumption by selectively activating the fine-SAR ADC. Also, the proposed dynamic residue amplifier consumes only 48 nW and the adaptive-reset comparator generates a chaotic map with only 6-nW consumption. The proposed TRNG core occupies 0.0045 mm2 in 0.18-


international conference of the ieee engineering in medicine and biology society | 2016

Sticker-type ECG/PPG concurrent monitoring system hybrid integration of CMOS SoC and organic sensor device

Yongsu Lee; Hyeonwoo Lee; Seunghyup Yoo; Hoi-Jun Yoo

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