Mitsuhiko Sakai

A Novel Truncated V-Groove 4H-SiC MOSFET with High Avalanche Breakdown Voltage and Low Specific on-Resistance

A breakdown of a conventional trench SiC-MOSFET is caused by oxide breakdown at the bottom of the trench. We have fabricated a novel trench SiC-MOSFET with buried p+ regions and demonstrated the high breakdown voltage of 1700 V and the specific on-resistance of 3.5 mΩcm2.

Blocking Characteristics of 2.2 kV and 3.3 kV-Class 4H-SiC MOSFETs with Improved Doping Control for Edge Termination

Blocking characteristics of 2.2 kV and 3.3 kV -class 4H-SiC MOSFETs with various doping conditions for the edge termination region have been investigated. By optimizing the implanted dose into the edge termination structure consisting of junction termination extension (JTE) and field limiting ring (FLR), a breakdown voltage of 3,850 V for 3.3 kV -class MOSFET has been attained. This result corresponds to about 95% of the approximate parallel-plane breakdown voltage estimated from the doping concentration and the thickness of the epitaxial layer. Implanted doping for the JFET region is effective in reducing JFET resistance, resulting in the specific on-resistance of 14.2 mΩcm2 for 3.3 kV SiC MOSFETs. Switching characteristics at the high drain voltage of 2.0 kV are also discussed.

Gate oxide reliability of 4H-SiC V-groove trench MOSFET under various stress conditions

The authors reported the optimization of the 4H-SiC V-groove Trench MOSFET (VMOSFET) structure in a previous conference (ISPSD2015). The VMOSFET has the buried p+ regions in the epitaxial layer to protect the trench bottom oxide. In this study, we characterized the long-term gate oxide reliability of the VMOSFETs under various stress conditions such as the gate bias or the drain bias. The VMOSFETs showed the Qbd of 28 Ccm-2 under the constant current stress TDDB measurement at RT. The threshold voltage of the VMOSFETs did not change significantly (|ΔVth|<; 0.12 V) under both the static and the switching gate bias conditions at 175°C for more than 1000 hours. The gate leakage current after the drain bias test did not change for over 6500 hours. In addition, the SCSOA of the VMOSFET was larger than 10 μsec.

150 A SiC V-groove trench gate MOSFET with 6 × 6 mm2 chip size on a 150 mm C-face in-house epitaxial wafer

We report the successful demonstration of large current and high-speed switching properties of SiC V-groove trench gate MOSFETs (VMOSFETs). A drain current of 150 A (at V DS = 2 V and V GS = 18 V) and breakdown voltage of 960 V were achieved from a packaged 6 × 6 mm2 single chip. Moreover, short switching times of t r = 81 ns and t f = 32 ns were also obtained. To fabricate such VMOSFETs with high yield, highly uniform in-house epitaxial growth technology on a 150-mm-diameter wafer is also one of the keys, owing to its characteristic dependence on drift layer carrier concentration.