Mitsuru Chida

High performance poly-Si TFTs on a glass by a stable scanning CW laser lateral crystallization

We have developed high performance poly-Si TFTs, which have comparable performance to that of [100] Si-MOSFETs, by using a stable scanning DPSS CW laser lateral crystallization without introduction of thermal damage to 300/spl times/300 mm/sup 2/ glass substrates with process temperature below 450/spl deg/C.

High-performance polycrystalline silicon thin film transistors on non-alkali glass produced using continuous wave laser lateral crystallization

We have developed high-performance polycrystalline silicon (poly-Si) thin film transistors (TFTs) with a field-effect mobility of 566 cm2/Vs for n-channel TFT and 200 cm2/Vs for p-channel TFT on 300 mm×300 mm non-alkali glass substrate. The TFTs were developed using a stable diode pumped solid state (DPSS) continuous-wave laser lateral crystallization (CLC) method at a temperature below 450°C. The high performance of the TFTs was attributed to the very large predominantly (100)-oriented grain. This crystallization method will enable high-performance Si-LSI circuits to be fabricated on large non-alkali glass substrates.

High Performance Low Temperature Polycrystalline Silicon Thin Film Transistors on Non-alkaline Glass Produced Using Diode Pumped Solid State Continuous Wave Laser Lateral Crystallization

High performance low temperature polycrystalline silicon (poly-Si) thin film transistors (TFTs) with large grains were created using diode pumped solid state (DPSS) continuous wave (CW) laser lateral crystallization (CLC), employing fabrication processes at 450°C. Field-effect mobilities of 566 cm2/Vs for the n-channel and 200 cm2/Vs for the p-channel were obtained for a thick Si film (100–150 nm) on a 300×300 mm non-alkaline glass substrate. The high performance of the TFTs is attributed to the predominantly (100)-oriented very large grains. With a decreasing Si-film thickness, the grain size decreases, and the surface orientation of the grain changes from (100) to other orientations. These effects lead to reduced field-effect mobility with decreasing Si-film thickness, but it is easy to obtain a high field-effect mobility of over 300 cm2/Vs, even with a 50 nm thick Si film, without special processing techniques. A complementary metal oxide semiconductor (CMOS) ring oscillator was fabricated using a thin Si film 65 nm thick to demonstrate the high circuit performance of CLC poly-Si TFTs by applying the simplest CMOS process technology. A delay of 400 ps/stage at a gate length of 1.5 µm and a supply voltage of Vdd=5.0 (V) was produced on a large non-alkaline glass substrate utilizing a fabrication temperature of 450°C. This crystallization method will lead to the fabrication of high-performance and cheap Si-LSI circuits on large non-alkaline glass substrates.

P‐3: The Effect of a Laser Annealing Ambient on the Morphology and TFT Performance of Poly‐Si Films

We have examined the effect of a laser annealing ambient on the morphology and TFT performance of poly-Si films. Oxygen in the ambient prevents the relaxation of surface roughness because of a thin oxide formed on the poly-Si surface during laser irradiation. Poly-Si films that crystallize in air (oxygen ambient) have larger gains, higher mobility, and rougher surfaces than films crystallized in a vacuum. To reduce this surface roughness, the surface oxide that formed during laser irradiation in air was removed and poly-Si films were irradiated by the excimer laser in a vacuum again. The surface roughness drastically decreased from 13 nm to 1 nm while the grain size remained the same.

Self-aligned top and bottom metal double gate low temperature poly-Si TFT fabricated at 550/spl deg/C on non-alkali glass substrate by using DPSS CW laser lateral crystallization method

Self-aligned top and bottom metal double gate (SAMDG) low-temperature polycrystalline silicon (poly-Si) thin film transistors (TFTs) were fabricated at 550/spl deg/C using the diode pumped solid state (DPSS) CW laser lateral crystallization (CLC) method, on non-alkali glass. The current drivability of these TFTs is eight or nine times as large as that of conventional excimer laser crystallized (ELC) poly-Si TFTs. It was confirmed that the extreme high performance of SAMDG CLC poly-Si TFT was maintained for gate length of 2.0 /spl mu/m.

Analytical photo leak current model of low-temperature CW laser lateral crystallization (CLC) poly-Si TFTs

We found that the absorption of backlight by TFTs is insensitive to poly-Si thickness t/sub Si/, while photo leak current of TFTs depends linearly on t/sub Si/. We modeled these phenomena by assuming that the Q electron-hole pairs generated recombine at both interfaces of poly-Si. According to this model the photo leak current depends linearly on t/sub Si/ and Q is independent of t/sub Si/. Our model also explained that the accumulation of hole charges degrades the subthreshold swing by increasing the channel potential increase.

Influence of laser annealing conditions on the performance of 0.6 μm polysilicon TFTs

We have investigated the influence of ambient and laser energy density on the characteristics of excimer laser crystallized poly-Si films and TFT performance. It was found that poly-Si films crystallized in air showed higher peak position of Raman spectra and larger grain size than those crystallized in vacuum. Excimer laser annealing (ELA) in vacuum made the surface roughness of poly-Si films smaller than that in air. These results show that oxygen plays an important role in grain growth. The investigation of TFT performance with gate length of 0.6 micrometers that is comparable to the grain size of ELA poly-Si films showed that intragrain defects as well as grain size influence the TFT performance.