Fumiyo Takeuchi

High performance poly-Si TFTs on a glass by a stable scanning CW laser lateral crystallization

We have developed high performance poly-Si TFTs, which have comparable performance to that of [100] Si-MOSFETs, by using a stable scanning DPSS CW laser lateral crystallization without introduction of thermal damage to 300/spl times/300 mm/sup 2/ glass substrates with process temperature below 450/spl deg/C.

High-performance polycrystalline silicon thin film transistors on non-alkali glass produced using continuous wave laser lateral crystallization

We have developed high-performance polycrystalline silicon (poly-Si) thin film transistors (TFTs) with a field-effect mobility of 566 cm2/Vs for n-channel TFT and 200 cm2/Vs for p-channel TFT on 300 mm×300 mm non-alkali glass substrate. The TFTs were developed using a stable diode pumped solid state (DPSS) continuous-wave laser lateral crystallization (CLC) method at a temperature below 450°C. The high performance of the TFTs was attributed to the very large predominantly (100)-oriented grain. This crystallization method will enable high-performance Si-LSI circuits to be fabricated on large non-alkali glass substrates.

High Performance Low Temperature Polycrystalline Silicon Thin Film Transistors on Non-alkaline Glass Produced Using Diode Pumped Solid State Continuous Wave Laser Lateral Crystallization

High performance low temperature polycrystalline silicon (poly-Si) thin film transistors (TFTs) with large grains were created using diode pumped solid state (DPSS) continuous wave (CW) laser lateral crystallization (CLC), employing fabrication processes at 450°C. Field-effect mobilities of 566 cm2/Vs for the n-channel and 200 cm2/Vs for the p-channel were obtained for a thick Si film (100–150 nm) on a 300×300 mm non-alkaline glass substrate. The high performance of the TFTs is attributed to the predominantly (100)-oriented very large grains. With a decreasing Si-film thickness, the grain size decreases, and the surface orientation of the grain changes from (100) to other orientations. These effects lead to reduced field-effect mobility with decreasing Si-film thickness, but it is easy to obtain a high field-effect mobility of over 300 cm2/Vs, even with a 50 nm thick Si film, without special processing techniques. A complementary metal oxide semiconductor (CMOS) ring oscillator was fabricated using a thin Si film 65 nm thick to demonstrate the high circuit performance of CLC poly-Si TFTs by applying the simplest CMOS process technology. A delay of 400 ps/stage at a gate length of 1.5 µm and a supply voltage of Vdd=5.0 (V) was produced on a large non-alkaline glass substrate utilizing a fabrication temperature of 450°C. This crystallization method will lead to the fabrication of high-performance and cheap Si-LSI circuits on large non-alkaline glass substrates.

Selective single-crystalline-silicon growth at the pre-defined active regions of TFTs on a glass by a scanning CW laser irradiation

We have developed a new Si crystallization method, which makes possible to form single-crystalline-silicon (Si) film in channel region of TFTs on non-alkali glass without introducing thermal damage into it, using a scanning solid-state CW laser (10 W). The peculiar characteristics of this crystallization method are introduction of pre-defined thick capping Si layer on the pre-patterned channel region and laser irradiation from back surface. We succeeded in formation of single-crystalline-Si with 1.5 /spl mu/m wide and 20 /spl mu/m long. High performance TFTs with mobility of 300 cm/sup 2//Vs, S-value 0.41 V/dec, Vth -0.5 V, and low off-current, were obtained by fabrication process below 450/spl deg/C. This crystallization uses stable solid-state laser and realizes the high-performance Si devices on non-alkali glass substrates, which are necessary to achieve System On Glass (SOG).

Mobility enhancement limit of excimer-laser-crystallized polycrystalline silicon thin film transistors

The effects of various carrier scattering mechanisms on excimer-laser-crystallized polycrystalline silicon (poly-Si) thin film transistors (TFTs) fabricated using 450 °C processes on a glass substrate were studied. Good performance of a separated by ion implanted oxygen (SIMOX) metal–oxide–semiconductor field-effect transistor (MOSFET) with field-effect mobility of 670 cm2/V s and a subthreshold swing value of 0.087 V/dec was obtained using these 450 °C processes. The results showed the formation of a good silicon/silicon dioxide (SiO2) interface that is comparable to that of thermal oxide, as well as the high capability of 450 °C processes. The performance of the above SIMOX-MOSFET is superior to that of excimer-laser-crystallized poly-Si TFTs fabricated using the same 450 °C processes. This shows that poorer performance of poly-Si TFTs is caused by the poor crystalline quality of the poly-Si film. The field-effect mobility is affected little by the in-grain microdefects and surface morphology of the exc...

Selective Single-Crystalline-Silicon Growth at the Pre-defined Active Region of a Thin Film Transistor on Glass by Using Continuous Wave Laser Irradiation

We have developed a new silicon (Si) crystallization method that makes it possible to form single-crystalline Si in the channel regions of thin-film transistors (TFTs) on non-alkali glass without introducing thermal damage. The method includes using a frequency-doubled (2ω) diode-pumped solid-state (DPSS) Nd:YVO4 continuous-wave (CW) laser (λ=532 nm). The unique characteristics of this crystallization method are the introduction of a pre-defined thick capping-Si layer on a pre-patterned channel region and laser irradiation from the back surface through the glass substrate. We succeeded in forming 2-µm-wide and 20-µm-long single-crystalline Si in the channel region of a TFT. A high-performance n-channel TFT on a glass substrate was obtained using a 450°C fabrication process. The TFT had a field-effect mobility of 400 cm2/Vs, a subthreshold swing of 0.16 V/dec, and a threshold voltage of 0.24 V.

12.3: High Throughput CW-Laser Lateral Crystallization for Low-Temperature Poly-Si TFTs and Fabrication of 16 bit SRAMs and 270MHz Shift Registers

Throughput improvement and fabrications of 4×4 bit SRAMs and 270 MHz shift registers are described for the CW-Laser Lateral Crystallization (CLC) of amorphous-Si on glass substrate. For the pixel array, effective area-crystallization rate is improved to 48cm2/s for 171ppi and 68cm2/s for 119ppi by 16 sub-laser-beams and 2m/s scanning speed.

Self-aligned top and bottom metal double gate low temperature poly-Si TFT fabricated at 550/spl deg/C on non-alkali glass substrate by using DPSS CW laser lateral crystallization method

Self-aligned top and bottom metal double gate (SAMDG) low-temperature polycrystalline silicon (poly-Si) thin film transistors (TFTs) were fabricated at 550/spl deg/C using the diode pumped solid state (DPSS) CW laser lateral crystallization (CLC) method, on non-alkali glass. The current drivability of these TFTs is eight or nine times as large as that of conventional excimer laser crystallized (ELC) poly-Si TFTs. It was confirmed that the extreme high performance of SAMDG CLC poly-Si TFT was maintained for gate length of 2.0 /spl mu/m.

LP-1: Late-News Poster: Scaling Effects of Sub-Micron Low-Temperature Poly-Si TFTs

Sub-micron TFTs were fabricated by using an undoped excimer-laser-crystallized Si film on a large glass substrate (300mm × 300mm) at exactly low process temperatures below 450 °C, for the first time. The mobility of n-channel TFT was 180cm2/Vs and that of p-channel was 30cm2/Vs, for small devices having 0.6 μm gate length and 0.6μm width. We observed no anomaly in threshold voltage and mobility as a function of gate length from 0.6 to 9.6 μm. However, positive shifts of threshold voltage were observed with decreasing gate width for both n-and p-channel devices.

Analytical photo leak current model of low-temperature CW laser lateral crystallization (CLC) poly-Si TFTs

We found that the absorption of backlight by TFTs is insensitive to poly-Si thickness t/sub Si/, while photo leak current of TFTs depends linearly on t/sub Si/. We modeled these phenomena by assuming that the Q electron-hole pairs generated recombine at both interfaces of poly-Si. According to this model the photo leak current depends linearly on t/sub Si/ and Q is independent of t/sub Si/. Our model also explained that the accumulation of hole charges degrades the subthreshold swing by increasing the channel potential increase.