Mitsuru Harada

120-GHz wireless link using photonic techniques for generation, modulation, and emission of millimeter-wave signals

We present a wireless link system that uses millimeter-wave (MMW) photonic techniques. The photonic transmitter in the wireless link consists of an optical 120-GHz MMW generator, an optical modulator, and a high-power photonic MMW emitter. A uni-traveling carrier photodiode (UTC-PD) was used as the photonic emitter in order to eliminate electronic MMW amplifiers. We evaluated the dependence of UTC-PD output power on its transit-time limited bandwidth and its CR-time constant limited bandwidth, and employed a UTC-PD with the highest output power for the photonic emitter. As for the MMW generation, we developed a 120-GHz optical MMW generator that generates a pulse train and one that generates a sinusoidal signal. The UTC-PD output power generated by a narrow pulse train was higher than that generated by sinusoidal signals under the same average optical power condition, which contributes to reducing the photocurrent of the photonic emitter. We have experimentally demonstrated that the photonic transmitter can transmit data at up to 3.0 Gb/s. The wireless link using the photonic transmitter can be applied to optical gigabit Ethernet signals.

2-GHz RF front-end circuits in CMOS/SIMOX operating at an extremely low voltage of 0.5 V

2-GHz RF front-end circuits [low noise amplifier (LNA), mixer, and voltage-controlled oscillator (VCO)] enabling 0.5-V operation are presented. The circuits were fabricated by 0.2-/spl mu/m fully depleted CMOS/SIMOX technology. The mixer has an LC-tuned folded structure to avoid stacking transistors. Undoped-channel MOSFETs are used in the VCO core and in a complementary source follower as output buffers for the mixer and the VCO. The noise figures of 3.5 dB (LNA) and 16.1 dB (mixer), IIP3 of -6-dBm (mixer), and phase noise of -110 dBc/Hz at 1-MHz offset (VCO) are achieved at a supply voltage of 1 V. They dissipate 2 mW (LNA), 4 mW (mixer), and 3 mW (VCO) at 0.5.

A 0.5-V MTCMOS/SIMOX logic gate

This paper proposes a multithreshold CMOS (MTCMOS) circuit that uses SIMOX process technology. This MTCMOS/SIMOX circuit combines fully depleted low-threshold CMOS logic gates and partially depleted high-threshold power-switch transistors. The low-threshold CMOS gates have a large noise margin for fluctuations in operating temperature in addition to high-speed operation at the low supply voltage of 0.5 V. The high-threshold power-switch transistor in which the body is connected to the gate through the reverse-diode makes it possible to obtain large channel conductance in the active mode without any increase of the leakage current in the sleep mode. The effectiveness of the MTCMOS/SIMOX circuit is confirmed by an evaluation of a gate-chain test element group (TEG) and an experimental 0.5-V, 40-MHz, 16-b ALU, which were designed and fabricated with 0.25-/spl mu/m MTCMOS/SIMOX technology.

Macromodels in the frequency domain analysis of microwave resonators

This paper describes a 1-V operation Bluetooth RF transceiver in 0.2-/spl mu/m CMOS SOI. The transceiver integrates a radio-frequency transmit/receive switch, an image-reject mixer, a quadrature demodulator, g/sub m/-C filters, an LC-tank voltage-controlled oscillator, a phase-locked loop synthesizer, and a power amplifier. The phase shifter in the quadrature demodulator is tuned dynamically to track the carrier-frequency drift allowed in the Bluetooth specification. The g/sub m/ cell in the filters uses depletion-mode pMOS transistors. In order to achieve 1-V operation, LC-tuned-folded and transistor-current-source-folded circuits are used in the RF and IF building blocks, respectively. In order to minimize power consumption, the current flowing through the circuit is optimally shared between the folded stages. A tuning circuit for the g/sub m/-C filters and a bias generation circuit ensure stable transceiver performance. The transceiver shows -77-dBm sensitivity at 0.1% bit error rate and consumes 33 and 53 mW from 1 V in the transmit and receive modes, respectively.

Investigation of a multigigahertz MOSFET amplifier with an on-chip inductor fabricated on a SIMOX wafer

This paper describes a technology that can be used to integrate multigigahertz RF circuits into large-scale digital circuits. Spiral inductors and a MOSFET amplifier with an inductive load were fabricated on a SIMOX wafer in order to demonstrate the feasibility of SOI technology. With a 1-V supply voltage, peaking of the amplifier gain was observed, as expected from circuit simulations, at 1-4 GHz. These results show that RF circuits with inductors can be implemented on a SIMOX wafer by using the conventional digital CMOS LSI process.

Ultra-low-voltage MTCMOS/SIMOX technology hardened to temperature variation

Abstract A novel multi-threshold CMOS (MTCMOS) circuit which offers the advantage of less variation in leakage current and delay time over a wide temperature range is described. It is shown that MTCMOS/SIMOX technology, which uses a SIMOX device and combines fully depleted low-threshold MOSFETs and partially depleted high-threshold MOSFETs, can reduce variation of circuit performance due to changes in the operating temperature. To evaluate the variation in circuit performance, models of the leakage-current and the delay-time including operating temperature are derived. Calculations using the models verify that the MTCMOS/SIMOX device with threshold voltages immune to temperature changes reduces the variation. This is also confirmed by an evaluation of a gate-chain TEG designed and fabricated with 0.25 μm MTCMOS/SIMOX technology.