Mk Marion Matters-Kammerer

Broadband CMOS Millimeter-Wave Frequency Multiplier With Vivaldi Antenna in 3-D Chip-Scale Packaging

This paper describes a frequency multiplier able to emit a broadband signal with a frequency range from 70 GHz up to at least 170 GHz. The device is composed of a nonlinear transmission line (NLTL) implemented in commercial CMOS 65-nm technology and an off-chip Vivaldi antenna. These two elements are packaged together with a 3-D chip-scale packaging technology. Characterization of the whole device and of the standalone NLTL is presented at frequencies up to 170 GHz.

A 71GHz RF energy harvesting tag with 8% efficiency for wireless temperature sensors in 65nm CMOS

This paper presents the first monolithically integrated RF-power harvesting 71 GHz wireless temperature sensor node in 65nm CMOS technology, containing a monopole antenna, a 71 GHz RF power harvesting unit with storage capacitor array, an End-of-Burst monitor, a temperature sensor and an ultra-low-power transmitter at 79 GHz. At 71 GHz, the RF to DC converter achieves a power conversion efficiency of 8% for 5 dBm input power.

A 62 GHz inductor-peaked rectifier with 7% efficiency

This paper presents the first 62 GHz fully onchip RF-DC rectifier in 65nm CMOS technology. The rectifier is the bottleneck in realizing on-chip wireless power receivers. In this paper, efficiency problems of the mm-wave rectifier are discussed and the inductor-peaked rectifier structure is proposed and realized. By using an inductor-peaked diode connected transistor, self-threshold voltage modulation, and an output filter, the measured rectifier reaches 7% efficiency with 1 mA current load. Compared to previous state-of-art 45 GHz rectifier with 1.2% efficiency [1], our solution achieves a higher efficiency at a higher frequency, providing a better solution for mm-wave wireless power receivers.

A 20 GHz 1.9 dB NF LNA with distributed notch filtering for VSAT applications

This paper presents a 20 GHz low noise amplifier (LNA) with notch filtering from 27.5 GHz to 31 GHz in a 0.25 μm SiGe:C BiCMOS technology. Notch filters are proposed to be implemented at different stages to have minor impact on the noise figure (NF), while achieving high attenuation around 30 GHz. In comparison with a reference LNA without filtering, it achieves overall filtering of more than -30 dB from 27.5 GHz to 31 GHz, with a NF of 1.9 dB degraded by only 0.1 dB to 0.4 dB. More than 17 dB improvement is achieved on the gain compression and triple beat IIP3 in presence of high power blocker. Besides, both LNAs achieve best NF to-date with high overall performance at K-band in silicon technologies.

System analysis and energy model for radio-triggered battery-less monolithic wireless sensor receiver

Monolithic wireless sensors with integrated antenna, on-chip transceiving, sensing and energy scavenging are low-cost and robust, thus very suitable for mass production and deployment. The design of such a sensor node requires a proper architecture with careful trade-offs and joint considerations over different building blocks. In this paper, we focus on the energy scavenging and receiver part of such a sensor node. A radio-triggered receiver architecture is proposed to achieve the extreme low energy budget. Energy/power models for different building blocks are developed that show the tradeoffs between available energy and sensor performance. A system-level analysis identifies the 60GHz mm-wave band is suitable for such applications. Moreover, a design example of receiver front-end in 65nm CMOS technology is presented to demonstrate the potential performance of the proposed architecture.

65-nm CMOS Monolithically Integrated Subterahertz Transmitter

This letter presents a transmitter for subterahertz radiation (up to 160 GHz), which consists of a nonlinear transmission line (NLTL) and an extremely wideband (EWB) slot antenna on a silicon substrate of low resistivity (10 Ω·cm). The fabrication was realized using a commercially available 65-nm CMOS process. On-wafer characterization of the whole transmitter, of the stand-alone EWB antenna, and of the stand-alone NLTL is presented. Reflection measurements show that the stand-alone EWB antenna has a -10-dB impedance bandwidth in the frequency bands of 75-100 GHz and 220-325 GHz, which agrees very well with the simulation results. The simulated radiation patterns of the antenna are also presented, indicating that the transmitter has an ominidirectional performance. The output power of the NLTL alone and of the transmitter is measured up to 160 GHz, from which the power gain of the on-chip antenna is derived and has a maximum value of -9.5 dBi between 90 and 120 GHz.

A 48 GHz 6-bit LO-path phase shifter in 40-nm CMOS for 60 GHz applications

This paper presents a 48 GHz high resolution LO-path phase shifter implemented in 40-nm low-power CMOS technology. The full 360° phase shift tuning is implemented by a switched capacitor loaded tunable transmission line for fine tuning, in combination with a selection of one out of the N×45° phase steps available from the frequency divider-by-4 for coarse tuning. The measured phase shift resolution is 5.4° between 44 GHz and 54 GHz, which offers about 6-bit resolution. The chip area of the core circuitry is 550μm×260μm, and the total current consumption is 14.1 mA from a 1.2 V supply voltage.

Extremely wideband CMOS circuits for future THz applications

Recent results in IC design have demonstrated the possibility to realize CMOS circuits working in the 100 GHz-1 THz band. In this chapter the design and measurements of a CMOS nonlinear transmission line and a CMOS Schottky diode sampling bridge are presented. Large-signal measurements of the nonlinear transmission lines from 6 to 168 GHz are shown. Time-domain measurements showing the possibility to sample ultrafast signals with fall time of 4.6 ps are described too. These two extremely wide band devices will be used as essential building blocks for the future implementation of a CMOS-based coherent THz spectrometer and imager.

A Millimeter-Wave Tunable Hybrid-Transformer-Based Circular Polarization Duplexer With Sequentially-Rotated Antennas

This paper presents a millimeter-wave tunable hybrid-transformer-based duplexer concept with dual-antenna configuration. By using orthogonal sequentially-rotated linearly-polarized antennas and the hybrid-transformer-based duplexer, the transmitter and receiver duplexes the two antennas with orthogonal circular-polarized signals. An on-chip tuning technique using magnetic coupling is introduced to improve the isolation of the duplexer in case of impedance imbalances. An alternative duplexer with a similar principle using an on-board rat-race coupler is also proposed and designed for comparison. In order to demonstrate the isolation with practical antenna connections, prototypes have been developed to integrate the on-chip duplexer and the rat-race coupler with on-board aperture-coupled microstrip antennas with sequential rotation technique. Measurement results demonstrate the orthogonal circular polarizations for the receiver and transmitter modes on both prototypes. The achieved isolation by the on-chip tunable duplexer is better than 50 dB between 30.2 and 31.2 GHz, while the achieved isolation by the rat-race version is about 20 dB in the same bandwidth.

A 50–60 GHz mm-Wave Rectifier With Bulk Voltage Bias in 65-nm CMOS

This letter presents a 50~60 GHz fully integrated 3-stage rectifier with bulk voltage bias for threshold voltage modulation in a 65-nm CMOS technology, which can be integrated in a mm-wave hybrid rectifier structure as the main rectifier. In this letter, the new technique of bulk voltage bias is proposed and implemented. In this method, the threshold voltage of MOSFETs in the main rectifier is modulated by biasing their bulk voltage, which improves the rectifier sensitivity and efficiency. Compared to the inductor peaking method [1] or local threshold voltage modulation technique [2] in CMOS technology, the circuit proposed in this letter achieves better sensitivity and efficiency while maintaining a compact size. The work achieves -10 dBm input sensitivity at 52 GHz with 1 V DC output voltage. The maximum efficiency at 52 GHz is 13%. The overall sensitivity over the 50~60 GHz band is better than -5 dBm.