Mohamed M. Aboudina

A 15.5-mW 20-GSps 4-bit charge-steering flash ADC

This paper presents a 4-bit 20-GSps time-interleaved flash ADC for an ADC-based high-speed serial-link equalizer. The ADC is designed and simulated in a 65-nm CMOS technology. It dissipates 15.5 mW from a 1-V supply while operating at 20 GSps. Low power consumption is achieved by utilizing charge-steering concept, sharing single reference ladder across all the four interleaved branches, and merging the dynamic latch into the pre-amplifier of the comparator. Results show that for a sinusoidal input frequency of 9.84 GHz with an amplitude of 600 mVdiff, the SNDR of the digital output is 23.9 dB, SFDR is 33.6 dB, and the effective number of bits (ENOB) is 3.67 bits.

Corrected and accurate Verilog-A for linear dopant drift model of memristors

There is an urgent need to develop accurate memristor circuit models for use in future large designs. Several Verilog-A and SPICE models have been presented which vary in their accuracy and simulation speed. This paper corrects a previous Verilog-A model and enhances the accuracy of another one. The results show that our proposal is stable over long simulation time, correctly predicts the behavior of circuits, provides a better accuracy, and is as fast as previous models. These results make our model the best choice for large memory or logic circuits designs using memristors.

A dual source microscale energy harvesting system for wireless sensor networks

This paper presents a muli-input multi-output battery-less energy harvesting system for microscale wireless sensor nodes that combines piezoelectric and photovoltaic energy sources. The system undergoes four states of operation to achieve two voltage levels at the output of 1.2V and 3V. It is a dual path system that uses a single inductor for both boost and buck converter. A maximum power point tracking technique is introduced to lock to the maximum power voltage of the photovoltaic transducer. The system was implemented in UMC CMOS 130nm technology. It achieves an efficiency up to 74% at 10mW of harvested power.

Dual-Source Self-Start High-Efficiency Microscale Smart Energy Harvesting System for IoT

This paper presents a low-power batteryless energy harvesting system for Internet of Things (IoT) applications. A dual-mode dc–dc converter is used to harvest the energy of a microscale photovoltaic (PV) transducer and provides energy, in the boost mode, to a super capacitor for storage. In the buck mode, the dc–dc converter provides energy to the load on demand. A piezoelectric transducer is used as a secondary input source to guarantee system self startup. The proposed system includes a smart control to adaptively adjust the number of sensors at the load, leading to better usage of the available energy at any given time. The implementation also includes a programmable switch sizing to optimize the overall systems efficiency for different load conditions. A maximum power point tracking is used to extract the maximum power of the PV transducer under various illumination conditions. The system has been implemented in a CMOS 130-nm technology and tested in various modes of operation. Self startup has been verified, and a peak efficiency of 90.5% has been measured.

Non-volatile low-power crossbar memcapacitor-based memory

This paper proposes the use of a memcapacitor as a new memory cell. This new element may lead to a better memory on many directions: non-volatility, speed, density, and power consumption. To the best of our knowledge, we present the first Verilog-A model for memcapacitors and use it to simulate the memory cell then complete crossbar arrays of various sizes. The reading circuits completely solve the sneak paths problem including the effect of coupling parasitics in the large arrays. Our analysis indicates that memcapacitor memories are non-volatile memories with a density at least equivalent to dynamic RAMs but with lower power consumption.

A low-power MPPT architecture for micro-scale photovoltaic transducers

In this paper, a maximum power point tracking (MPPT) system for indoors photovoltaic transducers is presented. The proposed system is used in conjunction with a switching DC-DC boost converter that generates a 1.2 V output for the circuits of the ultra-low-power application. The MPPT tracks different illumination intensities through changing the input impedance of the boost converter. The open circuit voltage of the photovoltaic transducer is compared with a reference voltage and the switching frequency of the boost converter is changed accordingly. The stability of the MPPT feedback system is analyzed for a wide range of illumination intensities. The proposed system has been implemented in a low-cost CMOS 130nm technology. It consumes a quiescent current less than 2.5μA and achieves an average tracking efficiency (TE) of 99%.

An adaptive slew rate and dead zone ring amplifier

This paper presents an adaptive ring amplifier that introduces a degree of freedom in speed/stabilization design trade-off in the original ring amplifier. It also introduces an area efficient solution for the auto-zeroing stability problem that the conventional ring amplifier suffers from. The proposed adaptive ring amplifier improves the linearity by 10dB at the same opera ting frequency. Moreover, it achieves a 40% improvement in the operating frequency for the same linearity and settling requirements. The proposed ring amplifier has been implemented and simulated in a low-cost CMOS 130nm technology while operating from a single 1.2V supply. It has a 98% area reduction compared to the conventional ring amplifier for the same stability conditions.1

Design and analysis of a low-power high-speed charge-steering based StrongARM comparator

This paper presents an ultra low-power high-speed dynamic comparator. The proposed dynamic comparator is designed and simulated in a 65-nm CMOS technology. It dissipates 7 μW, 21.1 μW from a 0.9-V supply while operating at 1 GHz, 3 GHz sampling clock respectively. Proposed circuit can work up to 14 GHz. Ultra low power consumption is achieved by utilizing charge-steering concept and proper sizing. Monte Carlo simulations show that the input referred offset contribution of the internal devices is negligible compared to the effect of the input devices which results in 3.8 mV offset and 3 mV kick-back noise.

Low-power front-end and local oscillator for millimeter-wave receivers

This paper presents the design of a 60-GHz millimeter wave (mm-wave) receiver RF front-end (LNA and mixer) and the local oscillator in CMOS65nm and 1.2-V supply. The system-level design and specifications of all blocks are discussed. Two-stage LNA is used to provide a total gain of 11dB with 6-dB NF. The power consumption for the LNA is 10mW and occupies an area of 0.08mm2. Fully differential Gilbert mixer is used with current bleeding technique to increase the gain. The conversion gain is more than 4dB at 10-MHz intermediate frequency. The area of the mixer is 0.0054mm2 and the power dissipation is 5mW. A differential Clapp oscillator is used for the push-push oscillator topology, which is suitable for mm-wave generation. The oscillator is single-ended and an on-chip balun is used to convert the output to differential. The receiver achieves 16-dB conversion gain and consumes 24mW.

An ultra-low-power boost converter for micro-scale energy scavenging

This paper presents an ultra-low-power boost converter for indoors photovoltaic energy harvesting applications. The boost converter, working in the discontinuous conduction mode (DCM), utilizes an active diode (AD) technique to avoid negative current flowing in the inductor and a control technique that allows supplying dual output voltage levels with sufficient power. The AD is implemented using a level-sensitive clocked comparator that is driven by the system clock while consuming 350nA only. The system clock is chosen as a compromise between required speed of the comparator, switching losses, and size of external inductor. Post-layout simulation results show an overall efficiency of 76.9% for an input power of 160μW while providing two outputs at 1.2V and 3V in 130nm CMOS technology.