Mohammad A. Al-Shyoukh

A Transient-Enhanced Low-Quiescent Current Low-Dropout Regulator With Buffer Impedance Attenuation

This paper presents a low-dropout regulator (LDO) for portable applications with an impedance-attenuated buffer for driving the pass device. Dynamically-biased shunt feedback is proposed in the buffer to lower its output resistance such that the pole at the gate of the pass device is pushed to high frequencies without dissipating large quiescent current. By employing the current-buffer compensation, only a single pole is realized within the regulation loop unity-gain bandwidth and over 65deg phase margin is achieved under the full range of the load current in the LDO. The LDO thus achieves stability without using any low-frequency zero. The maximum output-voltage variation can be minimized during load transients even if a small output capacitor is used. The LDO with the proposed impedance-attenuated buffer has been implemented in a 0.35-mum twin-well CMOS process. The proposed LDO dissipates 20-muA quiescent current at no-load condition and is able to deliver up to 200-mA load current. With a 1-muF output capacitor, the maximum transient output-voltage variation is within 3% of the output voltage with load step changes of 200 mA/100 ns.

Switch Bootstrapping for Precise Sampling Beyond Supply Voltage

Bootstrapped switches are used in a variety of applications including DC-DC converters, pipelined analog-to-digital converters and high voltage switches and drivers. Current work on highly integrated power management applications often requires the ability to measure voltage quantities that exceed the supply voltage in magnitude. This is primarily due to a basic need to maximize efficiency by running the power management IC on as low supply voltage as possible, while still maintaining the ability to sample and measure quantities from the surroundings that could well exceed the battery voltage. In this paper, a new bootstrapped switch is presented. The switch enables the precise sampling of input signals well greater than the chip supply voltage with no static power consumption, and without activating on-chip parasitic body diodes. The bootstrapped switch, presented here, is designed to sample an input signal with a 0-5.5-V range at a supply voltage of 2.75 V. Measurement data shows functionality for a 0-6-V input signal range with a supply voltage as low as 1.2 V

A Compact Ramp-Based Soft-Start Circuit for Voltage Regulators

A fully integrated soft-start circuit for voltage regulators is presented in this brief. A soft-start strategy based on a linearly ramped-up reference is adopted to prevent massive in-rush currents through the power device during the start-up phase of the regulator. The strategy is realized by a compact on-chip circuit, which requires no external components and has minimal transistor overhead, thereby minimizing the implementation area and cost of the overall regulator. The proposed soft-start circuit has been implemented in a 0.35-mum high-voltage complementary metal-oxide-semiconductor technology as part of a linear regulator controller for automotive applications. The proposed soft-start circuit occupies 0.026 mm2 on silicon, which corresponds to about one fifteenth of the total area of the linear regulator controller.

A bootstrapped switch for precise sampling of inputs with signal range beyond supply voltage

Bootstrapped switches are used in a variety of applications including DC-DC converters, pipelined analog-to-digital converters and high voltage switches and drivers. Current work on highly integrated power management applications often requires the ability to measure voltage quantities that exceed the supply voltage in magnitude. This is primarily due to a basic need to maximize efficiency by running the power management IC on as low supply voltage as possible, while still maintaining the ability to sample and measure quantities from the surroundings that could well exceed the battery voltage. In this paper a new bootstrapped switch is presented. The switch enables the precise sampling of input signals well greater than the chip supply voltage with no static power consumption, and without activating on-chip parasitic body diodes. The bootstrapped switch, presented here, is designed to sample an input signal with a 0-5.5 V range at a supply voltage of 2.75 V. Measurement data shows functionality for a 0-6 V input signal range with a supply voltage as low as 1.2 V

A Compact Fully-Integrated Extremum-Selector-Based Soft-Start Circuit for Voltage Regulators in Bulk CMOS Technologies

A fully-integrated soft-start circuit for voltage regulators is presented in this brief. A soft-start strategy based on an extremum selector and a linearly ramped-up reference is developed to prevent any massive in-rush current through the power device during the start-up phase of the regulator. The strategy is realized by a compact on-chip circuit that requires no external components and has minimal transistor overhead, thereby minimizing the implementation area and the cost of the overall regulator. The linearly ramped-up reference is created through the use of nonlinear MOS capacitors available in a low-cost bulk CMOS technology. The proposed soft-start circuit has been implemented in a 0.35-μm bulk CMOS technology as part of a 50-mA linear regulator. The proposed circuit occupies 0.013 mm2 on silicon, which corresponds to about 13% of the total area of the linear regulator. The soft-start circuit enables the output voltage of the regulator to be linearly ramped up to the steady state under different load currents and charging currents.

A Transient-Enhanced 20μA-Quiescent 200mA-Load Low-Dropout Regulator With Buffer Impedance Attenuation

This paper demonstrates a 200mA low-dropout regulator (LDO) for portable applications. Buffer impedance attenuation is developed to realize a single-pole loop response through shunt feedback. The LDO is thus unconditionally stable without using an ESR zero and output undershoots and overshoots are minimized during load transients. Implemented in 0.35μm twin-well CMOS, the LDO only dissipates 20μA quiescent current. With a 1μF output capacitor, the maximum transient-output variation is 54mV with full-load step change of 200mA.

A current-limiter-based soft-start scheme for linear and low-dropout voltage regulators

A soft-start strategy for linear and low-dropout voltage regulators based on a successive current-limiting scheme during the startup phase is presented. The proposed current-limiting scheme incorporates a digitally-programmable mechanism for precisely controlling the current profile of the pass device during the startup transient. The proposed scheme is compact, as it requires no external components and has minimal transistor overhead, thereby minimizing the implementation area and cost of the overall regulator. The proposed soft-start circuit has been developed on a standard 0.35-µm CMOS technology as part of a USB-powered linear regulator for portable power applications.

An 11 Bit Sub-Ranging SAR ADC with Input Signal Range of Twice Supply Voltage

Analog-to-digital converters are one of the essential components in modern highly integrated power management ICs (PMICs). Although, the conversion time and resolution requirements are relatively easy to achieve, the requirements such as extended input signal range exceeding the system supply level, low power consumption for higher system efficiency, and resilience to heavy substrate and supply noise complicate the design of the ADC. In this paper, an 11 bit sub-ranging SAR analog to digital converter designed for power management systems is presented. The supply voltage and the reference voltage of the converter are both equal to 2.75 V while any of its 8 input channels can vary between 0-5.5 V range (or twice the reference voltage). The integral and differential nonlinearities of the converter are 0.38 and 0.45 LSB respectively. The ADC draws only 140 muA of quiescent current and has a conversion time of 10 mus.

Stability and transient response enhancement techniques for low-dropout regulators

Low-dropout regulators (LDOs) are one of the most important power management modules for providing clean supply voltages in all portable devices. This tutorial first describes the limitations of a generic CMOS LDO on the stability and the load transient response. Then, stability of the state-ofthe-art LDOs with intermediate driver stages is discussed. Finally, a LDO design example using impedance attenuation (BIA) technique is presented. The BIA technique is able to reduce the number of low-frequency poles of the LDO without using any low-frequency zero, thereby improving the stability and the load transient response simultaneously.

A pipelined dual-channel switched capacitor programmable gain amplifier

Switched capacitor programmable gain amplifiers (SC PGAs) are used in a variety of applications including wireless baseband signal processing and automotive IC applications. The PGA simply boosts an incoming sampled analog signal before additional processing of that signal occurs further down-stream in the signal path. A number of applications often require the boosting of multiple analog input channels which often means including a dedicated PGA for every channel. In this paper a new pipelined dual-channel switched capacitor programmable gain amplifier with logarithmic gain stepping is presented. The new PGA offers a significant reduction in die area over solutions with dedicated PGAs. Furthermore, optimum gain matching characteristics between the two input channels are achieved due to the processing of both input channels with same hardware