Mohammad Madihian

A 5-GHz-band multifunctional BiCMOS transceiver chip for GMSK modulation wireless systems

This paper reports the first multifunctional 0.4-/spl mu/m BiCMOS-based transceiver chip developed for 5-GHz-band Gaussian minimum-shift keying modulation wireless systems. The chip integrates a low-noise radio-frequency amplifier, a down-mixer, and an intermediate-frequency (IF) amplifier in the down-converter path; an IF amplifier, a limiter, an up-mixer, and a buffer amplifier in the up-converter path; and a frequency doubler and a local oscillator amplifier in the local oscillator path. The chip featuring gain attenuation as well as standby mode operation uses a single 2.6-5.2-V bias voltage and dissipates 56 mW in receive mode and 66 mW in transmit mode. The transceiver chip size is 3.0/spl times/2.4 mm/sup 2/.

A sub-nanosecond resonant-type monolithic T/R switch for millimeter-wave systems applications

This paper is concerned with the design consideration, fabrication process, and performance of a V-band monolithic transmit/receive (T/R) switch for millimeter-wave wireless networks applications. The developed switch integrated circuit (IC) has a novel structure in which to pass a signal, it presents a parallel resonant circuit to the signal by forward biasing a pair of switching heterojunction FETs (HJFETs), but to block the signal, it presents a series resonant circuit to the signal by reverse biasing the switching HJFETs. With a control voltage of 0/3.2 V, the developed T/R switch exhibits a minimum insertion loss of 3.9 dB, a maximum isolation of 41 dB, and a high switching speed of 250 ps, over 57-61 GHz. The monolithic T/R switch chip size is 3.3 mm/spl times/1.7 mm.

Submicrometer fully self-aligned AlGaAs/GaAs Heterojunction bipolar transistor

A novel submicrometer fully self-aligned AlGaAs/GaAs heterojunction bipolar transistor (HBT) for reducing parasitic capacitances and resistances is proposed. The fabrication process utilizes SiO<inf>2</inf>sidewalls for defining base electrode width and separating this electrode from both emitter and collector electrodes. Measured common-emitter current gain β for a fabricated HBT with 0.6 × 10-µm²emitter dimension and 0.7 × 10-µm²× 2 base dimension is 26 at 9 × 10⁴-A/cm²collector current density.

A low-noise Ku-band AlGaAs/GaAs HBT oscillator

Design considerations, fabrication and performance results are described for a low-phase-noise Ku-band oscillator implemented using a fully self-aligned AlGaAs/GaAs heterojunction bipolar transistor (HBT). The transistor has a measured collector-current 1/f noise power density of 10/sup -19/A/sup 2//Hz at f=400 Hz for a collector current of 1.2 mA. The free-running oscillator developed represents an output power of 6 dBm at 15.5 GHz, with a single-sideband (SSB) FM noise of -65 dBc/Hz at 10 kHz off-carrier. The noise level is 24 dB lower than that for a GaAs FET oscillator, and 2 dB lower than that for a silicon voltage-controlled oscillator.<<ETX>>

Fully self-aligned AlGaAs/GaAs heterojunction bipolar transistors for high-speed integrated-circuits application

Structure optimization, uniformity consideration, and high-speed circuit performance for an AlGaAs/GaAs heterojunction bipolar transistor (HBT) are described. The HBT is fabricated in a fully self-alignment manner using only a single photoresist mask for achieving submicrometer-dimension devices, and, thus reducing parasitic elements. The fabricated HBTs exhibit excellent threshold voltage deviation sigma V/sub BE/=2 mV on a 2-in wafer, a CML gate propagation delay time tau /sub pd/=9.5 ps, and a toggle frequency f/sub tog/=13.3 GHz for a CML divide-by-two frequency divider. >

The design, fabrication, and characterization of a novel electrode structure self-aligned HBT with a cutoff frequency of 45 GHz

This paper establishes a systematic approach for the design, fabrication, and modeling of a newly proposed self, aligned Al-GaAs/GaAs heterojunction bipolar transistor (HBT) employing a two-dimensional heterostructure device simulator and a heterojunction bi-polar transistor circuit simulator. The developed HBT has an abrupt emitter-base heterojunction, and applies a novel structure in which a single base electrode is placed between two emitter electrodes. A fabricated 3 × 8 µm2two-emitter HBT exhibits a measured current gain cutoff frequency fT= 45 GHz and a maximum oscillation frequency fmax= 18.5 GHz. Results of frequency divider circuit Simulation indicate that the developed HBT would be 1.4 times faster than a conventional HBT in which one emitter electrode is located between two base electrodes.

A high-speed resonance-type FET transceiver switch for millimeter-wave band wireless network

This paper concerns with the design consideration, fabrication process, and performance of a CPW monolithic AlGaAs/InGaAs HJFET switch for V-band wireless networks applications. The Switch utilizes a resonance concept in order to either pass, or to block a signal by presenting, respectively, a parallel, or a series resonant circuit to the signal. A developed T/R switch exhibits state-of the art switching-speed and isolation of 250psec and 41dB, respectively, and an insertion loss of 3.9dB ovr V-band frequencies.

A 2-V, 1-10 GHz BiCMOS transceiver chip for multimode wireless communications networks

This paper concerns the design consideration, fabrication process, and performance results for an ultra-broadband, low-voltage, low-power, BiCMOS-based transceiver chip for cellular-satellite-LAN wireless communication networks. The transceiver chip incorporates an RF amplifier, a Gilbert down-mixer, and an IF amplifier in the receive path, and an IF amplifier, a Gilbert up-mixer, and an RF amplifier in the transmit path. For an RF frequency in the 1-10 GHz band and an IF frequency in the 100-1000 MHz band, the developed transceiver chip consumes less than 60 mW at 2 V, to yield a downconversion gain of 40 dB at 1 GHz and 10 dB at 10 GHz and an upconversion gain of 42 dB at 1 GHz and 11 dB at 10 GHz. To avoid possible start-up problems caused during stand-by to enable mode transition, a simple switching technique is employed for enabling either the receive or the transmit path, by changing the value of a reference voltage applied to both the down- and the up-mixers. While the developed transceiver chip exhibits the best performance for a dc supply voltage of 2 V, it shows a graceful degradation for a /spl plusmn/0.15 V voltage deviation. The transceivers chip size is 1.04 mm/spl times/1.04 mm.

L-C-band low-voltage BiCMOS MMICs for dual-mode cellular-LAN applications

This paper Is concerned with the design considerations and performance results for low-voltage Si monolithic microwave integrated circuits (MMICs) developed for mobile and personal communications applications. A 0.4 /spl mu/m ECL-BiCMOS process technology was employed to develop bipolar-based RF amplifiers, MOS-based IF amplifiers, BiCMOS-based simplified Gilbert mixers, and monolithic down-converter as well as upconverter ICs incorporating these elements. These converters are designed to operate at a bias voltage of 2 V over 1.8-6.2 GHz exhibiting a conversion gain of 35-15 dB with a variable IF frequency of up to several 100 MHz. Chip size for both the downconverter and upconverter ICs is 1.0 mm/spl times/0.7 mm.

GaAs-Monolithic IC's for an X-Band PLL-Stabilized Local Source

X-band GaAs-monolithic voltage controlled-oscillator (VCO), divide-by-four analog frequency divider, and Wilkinson power splitter have been developed for frequency stabilization of an X-band Iocal source in a phase-locked loop (PLL) system.The VCO has a series feedback configuration and utilizes an optimized design procedure to yield the highest dc-RF efficiency ever reported for a GaAs-monolithic FET oscillator. The frequency divider has a novel structure which applies a dual-gate FET mixer and two RC-coupled FET amplifier stages to establish a closed loop for generating a 1/4 subharmonic component of an input frequency. The Wilkinson power splitter consists of an isolation resistor and two quarter-wavelength lines, which have been realized in both meander and spiral forms. A VCO-driven frequency divider system incorporating these ICs consumes 380-mW total power to provide the 1/4 subharmonic component of the VCO frequency with more than 3-dBm output power over a 10.86-- 11.01-GHz range.