Mohan Dunga

Modeling Advanced FET Technology in a Compact Model

The need for meeting the expectations of continuing the enhancement of CMOS performance and density has inspired the introduction of new materials into the classical single-gate bulk MOSFET and the development of nonclassical multigate transistors at an accelerated rate. There is a strong need to understand and model the associated new physics and electrical behavior to ensure widespread very-large-scale-integration circuit applications of new technologies. This paper presents some of the efforts toward the modeling of new technologies for bulk MOSFETs and multigate transistors. A holistic model for mobility enhancement through process-induced stress and a dynamic behavior model for high-k transistors have been developed to capture some of the new effects and new materials in the bulk MOSFET. A new analytical model is also presented for the fundamentally new device structure-FinFET

BSIM-MG: A Versatile Multi-Gate FET Model for Mixed-Signal Design

A novel surface-potential based multi-gate FET (MG-FET) compact model has been developed for mixed-signal design applications. For the first time, a MG-FET model captures the effect of finite body doping on the electrical behavior of MG-FETs. A unique field penetration length model has been developed to model the short channel effects in MG-FETs. A multitude of physical effects such as poly-depletion effect and quantum-mechanical effect (QME) have been incorporated. The expressions for terminal currents and charges are co-continuous making the model suitable for mixed-signal design. The model has been verified extensively with TCAD and experimental data.

BSIM-CMG: A Compact Model for Multi-Gate Transistors

The scaling of conventional planar CMOS is expected to become increasingly difficult due to increasing gate leakage and subthreshold leakage.[1-2] Multi-gate FETs such as FinFETs have emerged as the most promising candidates to extend the CMOS scaling into the sub-25nm regime.[3-4] The strong electrostatic control over the channel originating from the use of multiple gates reduces the coupling between source and drain in the subthreshold region and it enables the Multigate transistor to be scaled beyond bulk planar CMOS for a given dielectric thickness. Numerous efforts are underway to enable large scale manufacturing of multi-gate FETs. At the same time, circuit designers are beginning to design and evaluate multi-gate FET circuits.

A Multi-Gate MOSFET Compact Model Featuring Independent-Gate Operation

A compact model for multi-gate MOSFETs with two independently-biased gates is presented. The core model is verified against TCAD simulations without the use of any fitting parameters. Real device effects such as short channel effects and body doping effects are captured. The use of the model is demonstrated through two simulation examples: (1) Back-gate dynamic feedback of FinFET SRAM cells and (2) Tuning of device variations through back gate biasing.

BSIM5 MOSFET Model

This paper summarizes BSIM5 MOSFET model for aggressively scaled CMOS technology which was released recently. Various new physical effects are timely addressed in the new physical core including more accurate physics that is easily extended to non-charge-sheet, completely continuous current and derivatives, and extendibility to non-traditional CMOS based devices including SOI and double-gate MOSFETs. The flexible architecture also enables the carry-over of BSFM4s accurate modeling of numerous device behaviors attributable to device physics or technologies.

Performance-Aware Corner Model for Design for Manufacturing

We present a methodology to generate performance-aware corner models (PAMs). Accuracy is improved by emphasizing electrical variation data and reconciling the process and electrical variation data. PAM supports corner (plusmnsigma and plusmn 2sigma) simulation and Monte Carlo simulation. Furthermore, PAM supports the practice of application-specific corner cards, for example, for gain-sensitive applications.

Charge-based core and the model architecture of BSIM5

The paper outlines the charge-based core and the architecture of the BSIM5 MOSFET model for sub-100 nm CMOS circuit simulation. The BSIM5 model is a continuous, completely symmetric and accurate non charge-sheet based MOS transistor model derived from the basic device physics, including various physics effects. Comparison of the inversion charge between the BSIM5 prediction and self-consistent numerical solution shows good agreement. The demonstration of fully symmetric characteristics of BSIM5, such as channel current and its high-order derivative in the Gummel symmetry test, and charge and trans-capacitances in a SPICE simulation, also implies BSIM5 is the physically symmetric MOSFET model valid for RF-analog circuit simulations.

Compact modeling of flicker noise variability in small size MOSFETs

A compact model has been developed to capture the variability of flicker noise resulting from the reduction in size of state of the art MOSFETs. The underlying physics of flicker noise in small area MOSFETs has been verified by two means: Monte Carlo simulation and analytic modeling. The statistical distribution of flicker noise is reported for the first time, supported by experimental data from two sets of devices with different areas. The developed model is capable of predicting the area dependence of noise at any frequency at desired %Yield.

Compact modeling of FinFETs featuring independent-gate operation mode

This paper describes the concept of the dynamic V/sub TH/ control in the compact modeling of FinFET. The model is implemented into Berkeley SPICE3 and verified with multiple-dimensional device simulator.

Statistical Compact Modeling of Variations in Nano MOSFETs

We present a methodology to generate performance-aware corner models--PAM. Accuracy is improved by emphasizing electrical variation data and reconciling the process and electrical variation data. PAM supports corner (plusmnsigma and plusmn2sigma) simulation and MC simulation. Furthermore, PAM supports application-specific corner cards, for example, for gain sensitive applications.