Mutsumi Hosoya

Quantum flux parametron: a single quantum flux device for Josephson supercomputer

A quantum flux parametron (QFP), a single quantum flux superconductive device that has a potential of up to 100-GHz switching with nW-order power dissipation, is considered. The potential of the QFP and key technologies when QFPs are applied to a Josephson supercomputer are described. Switching speed, stability, and power dissipation of a QFP are discussed. QFP gates, circuits, and systems are next described. Then, ultra-fast clock distribution using a standing wave is explained. High-speed operation at more than 10 GHz and 10/sup 14/ error-free operations per QFP have been demonstrated. Finally described is a high-density packaging scheme by three-dimensional integration, which is very important for ultra-high speed circuits because the propagation delay becomes dominant in such circuits.<<ETX>>

Coils for generating uniform fields in a cylindrical ferromagnetic shield

A Helmholtz coil is widely used for generating uniform magnetic fields. On the other hand, a ferromagnetic shield is the most common method to eliminate external magnetic fields. However, if a Helmholtz coil is used inside a ferromagnetic shield, the uniform magnetic field generated by the coil is disturbed because of the influence of the ferromagnetic shield. This article presents a new coil system that generates highly uniform magnetic fields in any direction even inside a ferromagnetic shield. This coil system does not waste valuable space inside the shield, because the coils are placed so that they touch the inner surface of the shield. The magnetic fields generated by the system were numerically calculated and confirmed by experiments. For a cylindrical shield of radius R0 with a ferromagnetic shielding disk at the bottom, the nonuniformity of the field is less than 1% within the space 0.7R0 from the central axis and below 3R0 from the top open edge of the shield.

Superconducting packet switch

Very broad band throughputs greater than 1T bit/sec are desired in heavily loaded communication systems. Using the merits of superconducting devices, a superconducting network system is expected to improve the throughputs of such communication bottleneck systems. The paper describes a superconducting packet switch which is indispensable to a proposed superconducting network system. Considering the characteristics of various switch architectures, the space-division Banyan type architecture is adopted for a superconducting packet switch proto-type. The complete design of the proto-type is performed and the total operation is numerically simulated and confirmed. A 2/spl times/2 switching element which controls the paths of two packets is a key component of the proto-type. The basic switching element with one-bit data width is fabricated and the correct operation is completely confirmed.<<ETX>>

Inductance calculation system for superconducting circuits

A method for calculating the inductance of complicated three-dimensional superconducting circuits is described. The current distribution is obtained by assuming that the edge currents satisfy both Maxwells and Londons equations. Inductance is calculated from the magnetic energy resulting from the current. Extrapolations are used to reduce the computational requirements and to increase the accuracy of the results. Using the method, a CAD (computer-aided design) system was developed for superconducting circuits. The inductance of 3-D superconducting circuits, which was unattainable except by experiments, can be easily calculated by this system. The coupling inductance of a DC SQUID (superconducting quantum interference device) is calculated using the CAD system. Agreement between experiment and the computation is good. >

Operation of a 1-bit quantum flux parametron shift register (latch) by 4-phase 36-GHz clock

The Quantum Flux Parametron (QFP) is a SFQ-type logic device which uses a single flux quantum (SFQ) to represent 1-bit of information. QFP circuits use a multi-phase external ac power which also acts as the clock for synchronization, hence QFP circuits are highly pipelined. The clock frequency must be increased to improve the throughputs of the circuits, so the control of a high frequency clock is a key technology for the QFP. This paper describes a clock distribution technique which utilizes the characteristics of a standing wave. Using this technique, the operation of a 1-bit QFP shift register by a 4-phase clock up to 36 GHz is shown. In the 4-phase clock operation of QFPs, the input is given in phase 1, the QFP switches in phase 2, the output is held during phase 3, and the QFP resets in phase 4. Therefore, the 4-phase 36-GHz operation means that each QFP switches or resets in less than 7 ps.<<ETX>>

Fundamental characteristics of the QFP measured by the DC SQUID

The fundamental characteristics are described of the quantum flux parametron (QPF), measured by a method in which the output signals of the QFP are detected with a DC SQUID. The DC SQUID linearly and continuously converts the output current of the QFP to voltage, allowing the output signal of the QFP to be measured as the voltage of the DC SQUID. The fundamental characteristics of the QFP have been experimentally confirmed in detail. >

Margin analysis of quantum flux parametron logic gates

An analytical approach is used to estimate the (quasi-static) margins of quantum flux parametron (QFP) logic gates. The operation of a single QFP is analyzed in detail, and input biases or output variations caused by parameter fluctuations are obtained. The results are used to estimate the margins and yields of the QFP logic gates. The relations between the margin and the parameter fluctuations are obtained. The yields are estimated assuming normal distributions of the fluctuations. The calculations are consistent with experiments performed to date. The static margins of the QFP logic gates discussed here are sufficient, with presently available process technology, for medium size integrated circuits.<<ETX>>

3.5 GHz operation of a superconducting packet switch element

The paper introduces a prototype model of a superconducting packet switch which is composed of an input buffer, a contention solver, and a distribution network. The input buffer and the contention solver enable contention-free distribution of data packets. The total design of the prototype has been completed and the total operation has been numerically simulated and confirmed. A 2/spl times/2 switching element which controls the paths of two packets is the key component of the prototype. The basic switching element with 1-b data-width is fabricated by a standard Nb trilayer process. Three-junction SQUIDs driven by a three-phase powering clock are used in the switch. The correct operation up to 3.5 GHz, limited by the measurement setup, is confirmed. The margin evaluation shows there remains enough margin at GHz operations.

Design and operation of a Quantum Flux Parametron bit-slice ALU

The design of Quantum Flux Parametron (QFP) majority logic circuits presents a number of unique constraints. For example, interconnects must be kept short and have a common small inductance. The former suggests that the bit-slice architecture is well suited to QFP circuits. In order to test this conjecture, a suitably complex logic circuit was designed and a small part of it was fabricated. A design for a 16-function bit-slice arithmetic-logic unit (ALU) was found that satisfied the constraints. It can compute on n-bit operands in 2n+4 QFP stages. A reduced version of the bit-slice ALU cell, containing 30 QFPs, was fabricated and successfully tested at low speed. The design experience showed that complex combinatorial QFP logic circuits are possible. Larger circuits will be feasible with computer-aided tools.<<ETX>>

A new quantum flux parametron logic gate with large input margin

The quantum flux parametron (QFP) is a flux-transfer, flux-activated Josephson logic device which realizes much lower power dissipation than other Josephson logic devices. Being a two-terminal device, its correct operation may be affected by coupling to other QFPs. The problems include backcoupling form active QFPs through inactive QFPs (relay noise), coupling between QFPs activated at different times because of clock skew (homophase noise), and interaction between active QFPs (reaction hazard). Previous QFP circuits worked by wired-majority, which is a linear input logic and has low input margin. A logic gate (D-gate) using a QFP to perform logic operations has been analyzed and tested by computer simulation. Relay noise, homophase noise, and reaction hazard are substantially reduced. Moreover, the inputs have little interaction, and hence input margin is greatly improved. Using only D-gates it is possible to realize any combinational logic function. Important logic functions can be realized using one gate, such as a two-input multiplexer, majority, and parity. Since the QFP has a latching effect, D-gates can realize fully pipelined circuits without additional registers.