Naiara Moreira
University of the Basque Country
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Publication
Featured researches published by Naiara Moreira.
Computers & Electrical Engineering | 2015
Elias Molina; Eduardo Jacob; Jon Matias; Naiara Moreira; Armando Astarloa
Display Omitted We describe the IEC 61850 communication model and provide an SDN-based framework.This framework mainly uses the OpenFlow, sFlow, and OVSDB protocols.It controls an IEC 61850 network, including resource analysis and management.It integrates traffic engineering techniques, such as QoS or traffic filtering. Smart Grid makes use of Information and Communications Technology (ICT) infrastructures for the management of the generation, transmission and consumption of electrical energy to increase the efficiency of remote control and automation systems. One of the most widely accepted standards for power system communication is IEC 61850, which defines services and protocols with different requirements that need to be fulfilled with traffic engineering techniques. In this paper, we discuss the implementation of a novel management framework to meet these requirements through control and monitoring tools that provide a global view of the network. With this purpose, we provide an overview of relevant Software Defined Networking (SDN) related approaches, and we describe an architecture based on OpenFlow that establishes different types of flows according to their needs and the network status. We present the implementation of the architecture and evaluate its capabilities using the Mininet network emulator.
conference of the industrial electronics society | 2013
Naiara Moreira; Armando Astarloa; Uli Kretzschmar
Since the publication of IEEE 1588-2008 standard, the interest in giving cyber-security to Precision Time Protocol (PTP) traffic has increased. Therefore, several researches regarding security vulnerabilities and possible implementation improvements can be found in the literature. Particularly, SHA-1 and SHA-2 based MAC algorithms specified in the standard have already been proved to be suboptimal. In this paper, the utilization of new SHA-3 based MAC is proposed and both AES-128 and SHA-3 hardware implementations are compared in the context of PTP networks.
international symposium on industrial electronics | 2013
Naiara Moreira; Armando Astarloa; Jesús Lázaro; Alain Garcia; Enekoitz Ormaetxea
Apart from traditional test and measurement systems where clock synchronization is required, new emerging application areas like SmartGrids and 4G cellular mobile backhaul networks present strong timing constraints in terms of precise time synchronization. Precision Time Protocol (PTP), as defined in IEEE 1588 standard, offers sub-microsecond synchronization using conventional Ethernet networks. Thus, its acceptance is heavily increasing. However, the protocol performance was reduced in large cascaded networks with varying latencies. This drawback was later softened by the second version of the standard with the introduction of the Transparent Clock (TC) device. In this paper, a general overview of PTPv2 and the utilization of TCs is outlined. The main contribution is a new TC architecture for a FPGA-based network device that benefits from reconfigurable devices flexibility.
international symposium on precision clock synchronization for measurement control and communication | 2015
Naiara Moreira; Jesús Lázaro; Jaime Jimenez; Mikel Idirin; Armando Astarloa
The limitations of Annex K, as defined in the second version of IEEE 1588 standard, lead the standardization committee to evolve from an integrated security solution to a set of internal and external security mechanisms. The aim of the group is to address different requirements and deployment paradigms of application specific profiles. In this paper, a comparative study of the proposed security solutions within the working group is presented. In addition, a new MACsec use case to provide hop-by-hop group security is introduced.
The Scientific World Journal | 2015
Elias Molina; Eduardo Jacob; Jon Matias; Naiara Moreira; Armando Astarloa
The network robustness and reliability are strongly influenced by the implementation of redundancy and its ability of reacting to changes. In situations where packet loss or maximum latency requirements are critical, replication of resources and information may become the optimal technique. To this end, the IEC 62439-3 Parallel Redundancy Protocol (PRP) provides seamless recovery in layer 2 networks by delegating the redundancy management to the end-nodes. In this paper, we present a combination of the Software-Defined Networking (SDN) approach and PRP topologies to establish a higher level of redundancy and thereby, through several active paths provisioned via the OpenFlow protocol, the global reliability is increased, as well as data flows are managed efficiently. Hence, the experiments with multiple failure scenarios, which have been run over the Mininet network emulator, show the improvement in the availability and responsiveness over other traditional technologies based on a single active path.
conference on design of circuits and integrated systems | 2014
Armando Astarloa; Jesús Lázaro; Unai Bidarte; J. A. Araujo; Naiara Moreira
In this paper, the latency times offered by two COTS IEC 62439-3 switch IP cores implementable on FPGAs have been compared. The first one, combines Cut-Through with Store-and-Forward switching architectures. The second IP is based only on Store-and-Forward switching technique. The analysis shows that a custom architecture that combines Cut-Through with Store-and-Forward approaches and takes advantage from Reconfigurable Technology offers the best latency times under any circumstance. This parameter is critical for the applications and sectors addressed in these new Reliable Ethernet protocols. Additionally, both IPs have been compared attending other features and resources required for their implementation. This comparison shows that a specifically designed architecture for the protocols specified in IEC 62439-3 offers excellent latency time and requires less resources than traditional Store-and-Forward ones.
conference of the industrial electronics society | 2013
J. A. Araujo; Jesús Lázaro; Armando Astarloa; Aitzol Zuloaga; Naiara Moreira
Parallel Redundancy Protocol (PRP) and High-availability Seamless Redundancy (HSR), defined in the IEC62439-3 about high availability automation networks and proposed as reference network topologies for substation communication networks by IEC61850, assure the upkeep of the communication when an error in a network occurs. Those methods consist in sending information duplicated through different and independent paths; so that nodes must be capable to eliminate the duplicated information circulating in the network. This paper analyzes ways to do the discard of those frames, which is crucial for a good implementation of the standard.
international symposium on industrial electronics | 2014
Naiara Moreira; Armando Astarloa; Uli Kretzschmar; Jesús Lázaro; Elias Molina
Having a common sense of time is a key factor for many Smart Grid functions, such as the Sampled-Value (SV) process bus operation. The IEC 61850 family of standards recommends the Precision Time Protocol (PTP) for substation communication networks. This protocol allows accuracies in the nanoseconds range using conventional Ethernet networks. But security is only defined as an optional extension and presents several vulnerabilities. In particular, the cryptographic algorithms specified in the standard are suboptimal due to latency and area cost and hence, in this paper, the implementation of the new SHA-3 based MAC in programmable devices is proposed to improve the impact of security on PTP performance.
IEEE Transactions on Smart Grid | 2017
Naiara Moreira; Jesús Lázaro; Unai Bidarte; Jaime Jimenez; Armando Astarloa
A synchronized common sense of time is a key factor for many smart grid applications, such as the sample value process bus operation. The precision time protocol (PTP), as defined in IEEE 1588-2008 standard, is highly recommended for substation communication networks, because it enables synchronization accuracies in the nanoseconds range through conventional Ethernet-based networks. This paper explores the implementation of PTP functionalities on new Xilinx Zynq-7000 all programmable system-on-chip (SoC) device. Different PTP master and slave implementations have been analyzed taking benefit from the flexibility of the SoC all programmable devices. The explored features go from simple only-software versions aided by PTP support of Gigabit Media Access Controllers (GMACs)embedded in the processor section to high-accuracy solutions that include custom PTP hardware in the logic section of the device. For each configuration approach, two different experimental setups based on two Zynq commercial low-cost boards has been built, and the protocol performance has been evaluated by measuring time offset between the pulse per second output signals of the master and the synchronized slave. The results obtained from this analysis show excellent accuracy results, with time offsets in the range of 40 ns and standard deviations of less than 10 ns.
reconfigurable computing and fpgas | 2015
Armando Astarloa; Naiara Moreira; Unai Bidarte; Marcelo Urbina; David Modrono
Cyber-Physical Production Systems are characterized by integrating sensors, processing and communication in Industrial Environments like in advanced manufacturing plants or in the new generation Smart Grids. In these context, the accuracy on the synchronization plays a vital role because it is the base for control operations and for the correlation among the distributed sensor data sampling. In this paper the application of the IEEE1588 Synchronization protocol over High Availability Ethernet networks is applied to a new generation Cyber-Physical Production Systems in order to achieve sub-microsecond synchronization. These CPPS can be used to build rings and to interconnect rings as well. These interconnections offer bumpless Ethernet redundancy, without the need of any additional network equipment. In order to measure the resilience and the accuracy of the 1588-aware high-availability network composed by these nodes, a distributed sensors implementation composed by HSR network nodes that benefits from reconfigurable technology (small FPGAs and powerful programmable SoCs)has been analyzed. As it has been verified, although in a case of network failure, the synchronization recovers automatically and the accuracy obtained is in the range of 1 μs, that offers a very good reference for many applications in the industry.