Naoki Oshima

A 30-MHz–2.4-GHz CMOS Receiver With Integrated RF Filter and Dynamic-Range-Scalable Energy Detector for Cognitive Radio Systems

A 30-MHz-2.4-GHz complementary metal oxide semiconductor (CMOS) receiver with an integrated tunable RF filter and a dynamic-range-scalable energy detector for both white-space and interference-level sensing in cognitive radio systems is reported. The second-order RF filter has only two stacked transistors, and its use, in combination with a subsequent harmonic rejection mixer, results in wideband interference rejection. The energy detector with programmable rectifiers provides dynamic-range (DR) scalability, enabling shared use for white-space/interference-level detection and automatic gain control. A prototype chip, fabricated using 90-nm CMOS technology, achieved over 42-dB harmonic rejection including 7th-order component without any external device, a 67-dB gain, a 5-8-dB noise figure, a -11-dBm in-band third-order intercept point, and a +38-dBm second-order intercept point while drawing only 25-37 mA from a 1.2-V power supply. Multi-resolution DR-scalable spectrum sensing with a 0.2-30-MHz detection bandwidth, -83-dBm minimum sensitivity, and a 29-48-dB DR was demonstrated.

A 30MHz–2.4GHz CMOS receiver with integrated RF filter and dynamic-range-scalable energy detector for cognitive radio

A 30MHz–2.4GHz CMOS receiver with a highly linear integrated tunable RF filter, as well as with a dynamic-range-scalable RSSI-based energy detector for both whitespace and interference-level sensing, is reported. The test chip, fabricated in 90-nm CMOS process, achieves over 42dB harmonic rejection including seventh-order harmonic without any external device, 67dB gain, 5–8dB NF, +1.7dBm in-band IIP3, and +37dBm IIP2 while drawing only 25–37mA from 1.2V supply.

A 2.88Gb/s digital hopping UWB transceiver

While a number of UWB transceivers having data rates of 480Mb/s have been successfully developed [1∓3], there is strong demand for still higher data rates. A digital hopping UWB transceiver that expands the baseband by three times over that of previous technologies to obtain a data rate of 2.88Gb/s is described. A frequency-hopping polyphase filter (FH-PPF) that switches the passband of an RX chain within a switching time of 5ns allows compatibility with present 480Mb/s or lower data rates, while requiring the use of only one LO frequency, as opposed to the need for three in previous technologies. An 800MHz baseband has been achieved through use of a passive LPF and a highpass feedback VGA. EVM was measured to be below −26dB up to 2.88Gb/s. RX power dissipation of 156mW was achieved with 90nm CMOS technology.

A 30-MHz-to-3-GHz CMOS array receiver with frequency and spatial interference filtering for adaptive antenna systems

A 30-MHz-to-3-GHz wideband CMOS phased array receiver with interference suppression capability in frequency and spatial domains is presented. A frequency filtering function is provided by a 16-phase, two-stage harmonic rejection mixer which also works as a 5-bit phase shifter in multi-chip phased array systems. Equipped with 6-bit amplitude control in addition to the phase, the array receiver enables analog null steering that can reduce a spatial interferer coming from a specific direction. The developed IC achieves more than 55-dB suppression of harmonic interference in the wide range from 30 MHz to 3 GHz. The multiple ICs configure a four-element adaptive array system for the measurement of space propagation. It is confirmed that the null steering function reduces spatial interference by 20 dB and improves an EVM from -12.7 dB to -26.3 dB even when a strong interferer exists.

A 1.3-degree I/Q phase error, 7.1 – 8.7-GHz LO generator with single-stage digital tuning polyphase filter

We have developed an LO generator having 1) a digitally I/Q imbalance tuning polyphase filter and 2) a PLL with a varactor-based VCO and an interleaved charge pump for wide frequency operation. A 90-nm CMOS implementation showed that the equivalent maximum phase error was below 1.3 degrees in 7.1 – 8.7-GHz frequency range.

A 0.4–3-GHz nested bandpass filter and a 1.1–1.7-GHz balun bandpass filter using tunable band-switching technique

This paper presents a second-order tunable single-ended (unbalanced) bandpass filter (BPF) with continuous 0.4–3-GHz coverage and a tunable balun BPF with continuous 1.1–1.7-GHz coverage for software-defined radio transceivers with the use of band-switchable and radio frequency (RF)-micro-electromechanical systems (MEMS)-tuned resonators. The BPFs are realized with two pairs of RF switches for coarse-tuning and RF-MEMS-tunable capacitors for fine-tuning. On the one hand, for the tunable single-ended BPF, a transition between three bands is enabled using two pairs of RF switches. On the other hand, for the tunable balun BPF, a transition between two bands is enabled using one pair of RF switches. Furthermore, the three-band switchable single-ended BPF is constructed in a nested two-filter bank structure for expanding the tuning range without increasing the footprint. In addition, to complement the discrete band gaps, RF-MEMS capacitor-tuned resonators are used, and a continuous tuning range of nearly the entire ultra-high-frequency band is achieved. The filter bank is fabricated on a Duroid substrate with e r = 3.5 and h = 0.787 mm. The filter bank has an insertion loss of 3.2–6.8 dB and a 1-dB bandwidth of 65–450 MHz with a continuous tuning range of 0.4–3 GHz.

A 30-MHz–3-GHz CMOS Array Receiver With Frequency and Spatial Interference Filtering for Adaptive Multi-Antenna Systems

A 30-MHz–3-GHz wideband complementary metal–oxide–semiconductor phased array receiver with interference suppression capability in the frequency and spatial domains is presented. A frequency filtering function is provided by a two-stage harmonic rejection mixer with 16-phase local oscillator (LO) signals that are generated by frequency dividers and phase interpolators. The developed IC suppresses third- to seventh-order harmonic interference by more than 55 dB in a wide range from 30 MHz to 3 GHz. The 16-phase LO signal generator combined with a 2-b baseband phase shifter (PS) also works as a 6-b PS. Equipped with a 6-b amplitude control in addition to the 6-b phase control, the array receiver enables analog null steering that can reduce a spatial interference coming from a specific direction. The multi-chip synchronization needed for the null steering function is realized with pre-set circuits in the frequency dividers. Space propagation measurements made on a four-element array antenna system using the developed ICs indicated that the null steering function reduces spatial interference by 20 dB and reduces the error vector magnitude of a 2-GHz radio frequency, 20-MHz bandwidth, and 64-quadrature amplitude modulation signal from −12.7 to −26.3 dB even when a strong interferer exists.

A X-Band Reconfigurable Phased Array Antenna System Using 0.13-µm SiGe BiCMOS IC with 5-Bit IF Phase Shifters

A X-band reconfigurable active phased array antenna system is presented. The phased array system consists of interconnected tile modules of which number can be flexibly changed depending on system requirements. The PCB integrated tile module assembles 4×4 patch antennas and flip-chipped phased array 0.13-μm SiGe BiCMOS ICs with 5-bit IF phase shifters. The concept of scalable phased array is verified by narrowing beamwidth in beamforming pattern and improving SNR in data transmission of 64-QAM OFDM signal as increasing the number of antenna elements.