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Dive into the research topics where Narayan Solayappan is active.

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Featured researches published by Narayan Solayappan.


Integrated Ferroelectrics | 1997

Influence of Ti-content in the bottom electrodes on the ferroelectric properties of SrBi2Ta2O9 (SBT)

G. Schindler; Walter Hartner; Vikram Joshi; Narayan Solayappan; Gary F. Derbenwick; Carlos Mazure

Abstract Stress behavior, results of AES analysis and electrical properties of SBT in dependence of electrode structure and annealing conditions are discussed. Evidence for degradation of the electrical properties of SBT due to diffusion of Ti is presented.


Integrated Ferroelectrics | 1997

Second generation liquid source misted chemical deposition (LSMCD) technology for ferroelectric thin films

Narayan Solayappan; Larry D. McMillan; Carlos A. Paz de Araujo; Bob Grant

Abstract This paper discusses the second generation liquid source misted chemical deposition (LSMCD) technology currently being developed for ferroelectric thin film deposition. A SubMicron Systems (SMS) Model Primaxx-2F cluster tool was used to deposit the films. The developments that have been made since the first generation machine are discussed. The process chamber schematics along with the characteristics of the aerosol generator are explained in detail. The electrical properties obtained from the films deposited by the tool are found to be similar to that of spin-on films. The step coverage obtained on patterned wafers are also shown. The LSMCD technique combines the advantages of spin-on such as simplicity, good stoichiometry control and superior electrical properties with the advantages of CVD such as superior step coverage, manufacturability, etc.


Integrated Ferroelectrics | 1997

Conformal LSMCD deposition of SrBi2(Ta1-xNbx)2O9

Narayan Solayappan; Gary F. Derbenwick; Larry D. McMillan; Carlos A. Paz de Araujo; Shinichiro Hayashi

Abstract This paper presents new results of Liquid Source Misted Chemical Deposition (LSMCD) of SrBi2(Ta1-xNbx)2O9 thin films showing good step coverage of 150 nm thick films into square openings approximately 1 μm deep by 0.6 μm wide. A SAMCO model HDF-6000 LSMCD machine was used for the ferroelectric deposition. Prior to the deposition of the ferroelectric film, a Pt bottom electrode of approximately 200 nm thickness was sputtered into an initial opening 1μm deep by 1μm wide. The LSMCD and new chemistry methodologies by which these results were obtained will be described in this paper. The electrical characteristics of the LSMCD films will also be reported. LSMCD films resulted in higher switched charge (2Pr) than the spin-on films. The coercive fields (2Ec) and maximum leakage currents were comparable for the two deposition methods. These results show that conformal LSMCD thin films can be used for sub-micron circuits containing ferroelectric memory.


Integrated Ferroelectrics | 1998

Imprint in ferroelectric SrBi2Ta2O9 capacitors for non-volatile memory applications

M. Grossmann; O. Lohse; D. Bolten; Rainer Waser; Walter Hartner; G. Schindler; Christine Dehm; Nikolas Nagel; Vikram Joshi; Narayan Solayappan; Gary F. Derbenwick

Abstract Imprint is known as a failure mechanism in ferroelectric capacitors due to a voltage shift in the hysteresis curve. A detailed study to investigate the time, temperature and bias voltage dependence of the voltage shift was performed on MOD SBT thin films. Lifetime extrapolation under operating conditions (125 °C) reveal values for the lifetime of well over ten years.


Integrated Ferroelectrics | 1998

Role of recovery anneals for chemical solution deposition (CSD) based SrBi2Ta2O9 (SBT) thin films

Walter Hartner; G. Schindler; Volker Weinrich; Nicolas Nagel; Manfred Engelhardt; Vikram Joshi; Narayan Solayappan; Gary F. Derbenwick; Christine Dehm; Carlos Mazure

Abstract Using a recovery anneal after deposition of the Pt top electrode and patterning the Platinum / SrBi2Ta2O9 bilayer has been established to obtain well shaped hysteresis curves with low leakage currents. Electrical properties of SBT test capacitors in dependence of temperature and time for the recovery anneal are discussed. Evidence for degradation of the electrical properties of SBT capacitors after patterning due to the appearance of a new unknown peak in X-ray diffraction (XRD) is presented.


Archive | 1998

Method and apparatus for fabrication of thin films by chemical vapor deposition

Carlos A. Paz de Araujo; Larry D. McMillan; Narayan Solayappan; Jeffrey W. Bacon


Archive | 1997

Method and apparatus for preparing integrated circuit thin films by chemical vapor deposition

Carlos A. Paz de Araujo; Larry D. McMillan; Narayan Solayappan; Jeffrey W. Bacon


Archive | 1999

Low temperature process for fabricating layered superlattice materials and making electronic devices including same

Narayan Solayappan; Vikram Joshi; Carlos A. Paz de Araujo


Archive | 1997

Process for fabricating layered superlattice materials and AB03 type metal oxides without exposure to oxygen at high temperatures

G. Schindler; Walter Hartner; Carlos Mazure; Narayan Solayappan; Vikram Joshi; Gary F. Derbenwick


Archive | 2000

Method and apparatus for misted liquid source deposition of thin film with reduced mist particle size

Narayan Solayappan; Robert W. Grant; Larry D. McMillan; Carlos A. Paz de Araujo

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Carlos A. Paz de Araujo

University of Colorado Colorado Springs

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De Araujo Carlos A. Paz

University of Colorado Boulder

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