Naveed Ahsan

Dual Band Tunable LNA for Flexible RF Front End

This paper presents a dual band LNA that can be switched between two bands (2.4 GHz & 5.2 GHz) for IEEE 802.1 la/b/g WLAN applications. The LNA is also tunable within each band and the tuning is incorporated by on-chip varactors. The test chip consists of two fully integrated narrow-band tunable LNAs along with SPDT switch. For power saving one LNA can be switched off. The technology process is 0.2 mum GaAs offered by OMMIC. The LNA can achieve a relatively good performance over the two bands as demonstrated by simulation. With a 3V supply, the LNA has a gain of 26.2 dB at 2.4 GHz and 21.8 dB at 5.2 GHz and the corresponding NF varies between 2.07 dB and 1.84 dB, respectively. The LNA has an IIP3 of -7 dBm at 2.4 GHz and -1.6 dBm at 5.2 GHz.

Highly linear wideband low power current mode LNA

This paper presents design considerations for low power, highly linear current mode LNAs that can be used for wideband RF front-ends for multi-standard applications. The circuit level simulations of the proposed architecture indicate that with optimal biasing a high value of IIP3 can be obtained. A comparison of three scenarios for optimal bias is presented. Simulation results indicate that with the proposed architecture, LNAs may achieve a maximum NF of 3.6 dB with a 3 dB bandwidth larger than 10 GHz and a best case IIP3 of +17.6 dBm with 6.3 mW power consumption. The LNAs have a broadband input match of 50 Omega. The process is 90 nm CMOS and with 1.1 V supply the LNAs power consumption varies between 6.3 mW and 2.3 mW for the best and the worst case IIP3, respectively.

Programmable microwave function array, PROMFA

This paper describes the performance of a new circuit concept, programmable microwave function array (PROMFA). The concept is based on an array of generic cells, in which a number of different functions can be realized. Each PROMFA cell is a four-port circuit, and several cells can easily be connected together in larger arrays. Simulated and measured results are presented.

PIN diode modelling for simulation and development of high power limiter, digitally controlled phase shifter and high isolation SPDT switch

This paper presents design and development of PIN diode based RF circuit blocks for radar applications. These RF blocks include a high power limiter, 5-bit digital phase shifter and a high isolation SPDT switch. PIN diode modelling technique along with design challenges and implementation schemes for these RF blocks have been discussed. For limiter, a loss reduction technique has been discussed that can reduce the noise figure of the receiver. For the intended application, the signal is limited from 1kW (60dBm) to 10 mW(10 dBm). Design philosophy and tradeoffs of a five bit digital phase shifter have been discussed in detail. The intended phase increments are 11.25, 22.5, 45, 90 and 180 degrees with tolerance of +/-1, 2, 3, 5, 7 degrees respectively. For PIN diode switch application, isolation improvement technique has also been presented. The targeted loss is 1 dB with isolation of 20 dB all over the band. Simulation and measured results of all three RF blocks are in good agreement, thus indicating the accuracy of proposed PIN diode modelling technique.

Applications of Programmable Microwave Function Array (PROMFA)

This paper describes the use of programmable microwave function array (PROMFA) for different microwave application. The PROMFA concept is based on an array of generic cells, in which a number of different functions can be realized. Each PROMFA cell is a four-port circuit, that can either be programmed independently or collectively according to a specific need. Specifically, the phase shift capability in a single PROMFA cell, useful for a new type of phase shifter design is discussed. The paper also presents the functionality of this new architecture as a beamforming network. As an example case an active corporate feed network and a tunable recursive filter is demonstrated. Simulated and measured results are presented.

Design, development and linearity testing of synthesized FMCW RF source

This paper presents the design and development of an X-band LFM sweep generator. The proposed waveform generator utilizes a fully synthesized hybrid architecture that combines the advantages of both DDS and PLL. The architecture consists of a synthesized PLL source with DDS as a reference generator. At start up, the PLL is programmed for a fixed frequency while DDS is programmed for a linear triangular sweep. The PLL follows the reference that results in a linear RF sweep. This paper also presents the linearity testing of the synthesized FMCW RF source. The test was performed on a down-converted signal using a high sampling oscilloscope. The measured results indicate that with the proposed scheme, a very linear chirp can be generated at X band that is very useful for radar applications.

Design and development of a high power 1×5 splitter/combiner for solid state radar transmitters

This paper presents an L-band non binary six port (1×5) power splitter/combiner utilizing stripline architecture. The detailed design, its implementation and testing is the main focus of this paper. The circuit optimization has been carried out utilizing ADS®. The paper also provides the comparison of simulation and measured results. The measured results indicate that the splitter/combiner has an amplitude balance of ± 0.8 dB with a frequency BW of 500MHz in L-band. Both Input and output VSWR is less than 1.55 while the worst case insertion loss is 0.36 dB. All these results make this combiner/splitter very useful for solid state amplifiers for radar applications.

Ranging using amplitude comparison of closely spaced time samples

This paper presents a new scheme for the range estimation of an unknown radar emitter. With the proposed algorithm, range of unknown radar emitter can be determined by amplitude comparison of closely spaced time samples. A mathematical model of this ranging method is discussed in detail and supported by computer simulations. For various scenarios, the standard deviation in range estimate has been estimated. For normal incidence, the simulation results indicate that standard deviation in range estimate is only 76m for a 20Km range considering 10dB SNR and observer position error of ±1m. The comparison of proposed method with traditional triangulation method has also been presented. The comparison indicates that for a single platform configuration, the proposed scheme provides more accurate range estimation in a short span of time. Therefore, making it a suitable choice for applications where fast update is required.

On-Chip Stimulus Generator for Gain, Linearity, and Blocking Profile Test of Wideband RF Front Ends

This paper presents the design and measurement of a stimulus generator suitable for on-chip RF test aimed at gain, 1-dB compression point (CP), and the blocking profile measurement. Implemented in a 90-nm complementary metal-oxide-semiconductor (CMOS), the generator consists of two low-noise voltage-controlled ring oscillators (VCOs) and an adder. It can generate a single- or two-tone signal in a range of 0.9-5.6 GHz with a tone spacing of 3 MHz to 4.5 GHz and adjustable output power. The VCOs are based on symmetrically loaded double-differential delay line architecture. The measured phase noise is -80 dBc/Hz at an offset frequency of 1 MHz for the oscillation frequency of 2.4 GHz. A single VCO consumes 26 mW at 1 GHz while providing -10-dBm power into a 50-Ω load. The silicon area of the complete test circuit including coupling capacitors is only 0.03 mm2, while a single VCO occupies 0.012 mm2. The measured gain, 1-dB CP, and blocking profile of the wideband receiver using the on-chip stimulus generator are within ±8%, ±10%, and ±18% of their actual values, respectively. These error values are acceptable for making a pass or fail decision during production testing.