Nigel Cave

Characterization of sputtered barium strontium titanate and strontium titanate-thin films

Sputtered Ba1−xSrxTiO3 (BST) and SrTiO3 (STO) films and capacitors made with these dielectrics have been characterized with respect to physical and electrical properties. Specific capacitance values included a high of 96 fF/μm2 for BST films deposited of 600 °C and a high of 26 fF/μm2 for STO films deposited at 400 °C. Leakage current densities at 3.3 V for the most part varied from mid 10−8 to mid 10−6 A/cm2. All of the dielectrics are polycrystalline, although the lowest temperature STO films have a nearly amorphous layer which impacts their capacitance. Grain size increases with deposition temperature, which correlates to higher dielectric constants. The lattice parameter of the BST films is larger than that of bulk samples. Capacitance, leakage, breakdown, and lifetime results are reported.

Polarized off-axis Raman spectroscopy: A technique for measuring stress tensors in semiconductors

A characterization technique was developed for measuring the complete tensor nature of stress fields in semiconductors. By combining incident light tilted away from the normal axis with polarization of the incident and scattered beams, any Raman-active optical phonon mode can be selectively studied. Once the frequencies and intensities of these phonons are known, the complete stress tensor can be determined. Using this concept, a general, systematic theory and methodology for implementing polarized off-axis Raman spectroscopy was developed that took into account realistic effects which would be encountered in an actual experiment. This methodology was applied to mechanically deformed silicon wafers. By applying loads in different configurations across the wafer, various types of stress were created including tension, compression, and shear. The polarized off-axis Raman technique was validated by comparing its results to both analytic calculations based upon the theory of elasticity and to direct measureme...

Substitutional carbon in Si1−yCy alloys as measured with infrared absorption and Raman spectroscopy

We present a study of the infrared absorption and Raman scattering intensity of the local carbon mode in Si1−yCy alloys grown by direct carbon implantation followed by different recrystallization procedures. For the case of laser-induced recrystallization, the integrated infrared absorbances are found to agree with an extrapolation of the calibration curve previously determined for very low substitutional carbon concentrations in Si. We argue that this finding provides strong evidence for the achievement of nearly perfect substitutionality in laser-recrystallized films, even though their carbon concentrations are three orders of magnitude beyond the solubility limit of carbon in Si. This conclusion is found to be consistent with measurements of the intensity of defect-induced Si Raman scattering relative to the Raman intensity of the local carbon mode. The Raman intensity of the local carbon mode at 605 cm−1 relative to the first-order Si Raman line at 521 cm−1 provides an ideal spectroscopic tool for the...

Measuring the tensor nature of stress in silicon using polarized off‐axis Raman spectroscopy

Polarized off‐axis Raman spectroscopy is a technique for measuring the complete tensor nature of stress fields in semiconductors. By combining incident light tilted away from the normal axis with polarization of the incident and scattered beams, any Raman‐active optical phonon mode can be selectively studied. Once the frequencies and intensities of these phonons are measured, the complete stress tensor can be uniquely determined. This technique has been applied macroscopically to mechanically deformed silicon wafers under biaxial tension. The results of this approach compare favorably with the stress calculated by means of the theory of elasticity.

Experimental determination of the impact of polysilicon LER on sub-100-nm transistor performance

Photoresist line edge roughness (LER) has long been feared as a potential limitation to the application of various patterning technologies to actual devices. While this concern seems reasonable, experimental verification has proved elusive and thus LER specifications are typically without solid parametric rationale. We report here the transistor device performance impact of deliberate variations of polysilicon gate LER. LER magnitude was attenuated by more than a factor of 5 by altering the photoresist type and thickness, substrate reflectivity, masking approach, and etch process. The polysilicon gate LER for nominally 70 - 150 nm devices was quantified using digital image processing of SEM images, and compared to gate leakage and drive current for variable length and width transistors. With such comparisons, realistic LER specifications can be made for a given transistor. It was found that subtle cosmetic LER differences are often not discernable electrically, thus providing hope that LER will not limit transistor performance as the industry migrates to sub-100 nm patterning.

Practicing extension of 248-nm DUV optical lithography using trim-mask PSM

It is becoming increasingly clear that semiconductor manufacturers must rise to the challenge of extending optical microlithography beyond what is forecast by the current SIA roadmap. Capabilities must be developed that allow the use of conventional exposure methods beyond their designed capabilities. This is driven in part by the desire to keep up with the predictions of Moores law. Additional motivation for implementing optical extension methods is provided by the need for workable alternatives in the event that manufacturing capable post-optical lithography is delayed beyond 2003. Major programs are in place at semiconductor manufacturers, development organization, and EDA software providers to continue optical microlithography far past what were once thought to be recognized limits. This paper details efforts undertaken by Motorola to produce functional high density silicon devices with sub-eighth micron transistor gates using DUV microlithography. The preferred enhancement technique discussed here utilizes complementary or dual-exposure trim-mask PSM which incorporates a combined exposure of both Levenson hard shifter and binary trim masks.

THE ONSET OF SECONDARY PHASE PRECIPITATION DURING SYNTHESIS OF HETEROEPITAXIAL SI1-X-YGEXCY ON SI(100)

An upper temperature limit of 450 °C has been established for growth of heteroepitaxial Si1−x−yGexCy solid solutions with substitutional C on Si(100) by combined ion and molecular beam deposition (CIMD). At 450 °C infrared absorption spectroscopy shows that C is on substitutional sites and no SiC precipitates are detected, whereas at 560 °C the substitutional C signal is much smaller but SiC precipitates are still not detected. High resolution transmission electron microscopy shows that Si1−x−yGexCy films deposited at 560 °C exhibit Ge deficient, coherent, secondary phase clusters in the cubic diamond matrix, which are not seen in films deposited at 450 °C. These observations suggest that the clusters are C‐rich, Ge‐deficient precursors to SiC, with a lattice which is distorted but free of extended defects. Ion channeling results indicate that the Si1−x−yGexCy films might have a distribution of different bond lengths.

Surface segregation in blends containing poly(dimethylsiloxane)-polystyrene block copolymers

The surface composition of polystyrene blends containing poly(dimethylsiloxane)-polystyrene block copolymers have been analyzed using X-ray photoelectron spectroscopy (XPS), contact angle measurements, and time-of-flight secondary ion mass spectrometry (TOFSIMS). The three techniques showed the surface of the blend samples to be identical to pure poly(dimethylsiloxane) homopolymer, despite the fact that the systems each contained only a 2% bulk concentration of siloxane. The high surface sensitivity of TOFSIMS—which probes the samples to depths of a few angstroms—indicates an enrichment of-Si(CH3)3 groups at the surface. These are the terminal groups of the PDMS part of the block. Their enrichment at the surface of the samples is presumably due to their low surface energy, in addition to the tendency for end groups to be at the surface due to free volume considerations.

Effects of complementary phase-shift imaging on gate CD control

Gate patterning has always been held to tight specifications for CD variation compared to other layers. Specifically, the gate layer is more concerned with the total CD variations including Across Chip Linewidth Variation (ACLV), Across Wafer Linewidth Variation (AWLV), CD variation through pitch (Proximity bias), than other layers. Therefore, complementary phase shift (c:PSM) imaging has been introduced at the gate layer under the assumption that it will reduce the total CD variation compared to binary imaging. However, c:PSM data conversion of random logic can introduce additional biases that also impact CD control. These new biases include CD variation as a function of shadow size, reticle-to-reticle overlay error, shifter width, and shifter height (a function of the transistor width and the shifter extension). This paper will show the improvements in ACLV and AWLV using c:PSM. This paper will also look at the increase in the proximity bias for c:PSM compared to binary imaging and show results for implementing a 1-D OPC correction on the phase shift reticle. In addition, this paper will also look at the magnitude of the various additional c:PSM biases mentioned. This paper will discuss the interaction of the different phase shift conversion input parameters for complex random logic and the limitations they impose on how tight we can make the final CD distribution. Finally, since c:PSM allows for selective sizing of CDs over active and over field, a brief discussion will also be given for the CD control of the complementary binary reticle.

Theoretical and experimental optimization of numerical aperture and partial coherence for complementary phase-shift processes

Complementary phase shift processes (c:PSM) have shown great promise for practical implementation of alternating phase shift technology. The incorporation of both binary and phase shift masks into a single resist process requires careful consideration of the illumination conditions. Modeling studies examined the impact of the numerical aperture (NA) and partial coherence (PC) on the depth of focus and exposure latitude of a typical DUV resist process. Experimental verification of the modeling results identified optimal NA/PC conditions for both independent and common mask illumination conditions while demonstrating the utility of lithography simulations for NA/PC optimization in c:PSM processes.