Nobuhiro Kawai

Noise analysis of high-gain, low-noise column readout circuits for CMOS image sensors

The temporal read noise on the signal path of a complementary metal-oxide semiconductor image sensor is analyzed to investigate the effectiveness of high-gain column amplifiers in enhancing sensor sensitivity. The signal path examined includes a pixel source follower, a switched-capacitor, noise-cancelling, high-gain amplifier, and a sample-and-hold circuit in each column. It is revealed that the total random readout noise consists of a component due to noise charge sampled and held at the charge summation node of the amplifier and transferred to the output, and a direct noise component sampled at the sample-and-hold stage at the output of the column amplifier. The analysis suggests that the direct noise components can be greatly reduced by increasing the column amplifier gain, indicating that an extremely low-noise readout circuit may be achievable through the development of a double-stage noise-cancelling architecture.

Effectiveness of a correlated multiple sampling differential averager for reducing 1/f noise

Correlated multiple sampling differential averaging (CMSDA) is useful for realizing low-noise column readout circuits in CMOS image sensors. CMSDA involves sampling the signal and reset levels multiple times and differentiating the averages. In other words, this method is like averaging of correlated double sampling (CDS) for the multiple sampling of signal and reset levels. This paper analyzes the effectiveness of CMSDA for reducing 1/f noise and the analysis is in good agreement with time-domain simulations.

Measurement of low-noise column readout circuits for CMOS image sensors

This brief describes the measurement results of high-gain column readout circuits for CMOS image sensors. The measurement results show that the double-stage noise-canceling architecture has better noise performance than that of the single-stage architecture at a first-stage gain of greater than 6. The lowest input-referred noise is measured to be 49 muVrms at a gain of 24

Noise calculation model for high-gain column amplifiers of CMOS image sensors

One of the important features in CMOS image sensors regarding high sensitivity is that the random readout noise can be better than that of the CCD, if the property of narrow noise bandwidth in CMOS active pixel sensors is effectively used. This is especially important for mega-pixel video-rate image sensors. To meet the requirement, the use of high-gain amplifier at the column of the CMOS imager is effective, because the noise due to wideband amplifier at the output of the image sensor can be relatively reduced. However, it has not been clarified how much the column amplifier can contribute to the noise reduction effect. In this paper, we present a noise calculation model of a switched-capacitor type column amplifier. The total noise consists of a noise component due to the noise charge sampled and held at the charge summation node of the amplifier and transferred to the output, and a noise component directly fluctuates the S/H stage at the output of the column amplifier. The analytically calculated noise has well agreement with that of the simulation results using a circuit simulator.