Nobukazu Tsukiji

Analysis and design of operational amplifier stability based on Routh-Hurwitz method

This paper proposes to use Routh-Hurwitz stability criterion for analysis and design of the opamp stability, when its small equivalent circuit is derived; this can lead to explicit stability condition derivation for opamp circuit parameters, and this is very effective especially for multi-stage opamps. The proposed method has been verified by two two-pole amplifiers with theoretical analysis and SPICE simulations, as examples.

Derivation of loop gain from output impedances in DC-DC buck converter

We propose a method to derive the loop gain from the open-loop and closed-loop output impedances in dc-dc buck converter. This enables to measure the loop gain without injecting a signal into feedback loop, i.e. without breaking the feedback loop; hence the proposed method can be applied for the control circuits implemented on an IC. Our simulation and experiment results show that the loop gain obtained from the proposed method matches very well with the one from the conventional method.

Hysteretic controlled buck converter with switching frequency insensitive to input/output voltage ratio

This paper proposes a hysteretic control buck converter with constant switching frequency. There even when the input/output voltage ratio in the steady changes, the switching frequency does not change (only on-time changes). On the other hand, when the load changes in the transient state, the switching frequency changes for quick response. We have designed and simulated the proposed circuit, and confirmed its operation.

Single-inductor dual-output soft-switching converter with voltage-mode resonant switch

This paper presents our study on the soft-switching converters with voltage-mode. The switching converters are well-known to obtain high efficiency, but their resonant voltages of the voltage-mode converters go very high. We propose here a soft-switching converter with the clamp circuit in order to reduce the peak voltages. We have investigated the difference of the characteristics with/without the clamp circuit for both half/full-wave converters in simulation. Further, we have investigated a single-inductor dual-output converter in order to reduce the number of the resonant parts.

Simple reference current source insensitive to power supply voltage variation - improved Minoru Nagata current source

This paper describes design improvement of the constant current source (peaking current mirror), originally invented by Nagata Minoru in 1966. Our improved current mirror circuits with MOS and Bipolar are insensitive to wide range of power supply voltage variation; they are realized by addition of multiple current peaks. We show their circuit topologies, operations and simulation results. The proposed reference current circuits are simple, small yet well-insensitive to power supply voltage variations, and hence they can be widely used in analog ICs.

Optimization and analysis of high reliability 30–50V dual RESURF LDMOS

This paper describes an optimized dual RESERUF LDMOs with enhanced reliability for 30–50V automotive applications. The proposed LDMOS is designed to suppress drain current expansion due to Kirk effect. Simulation verified that the avalanche breakdown voltage is scalable from 32 to 60V, with the breakdown location always in the bulk, ensuring good ESD performance. Low specific on-resistance of 44.8mΩmm2 at breakdown voltage of 60.7V is also obtained. Furthermore, the LDMOS indicates superior low power dissipation in the practical switching frequency range of DC-DC converters.

Study on electron mobility model for AlN/GaN MIS-HEMTs with embedded source field-plate structures

Electron mobility has been characterized for drain current simulations of AlN/GaN MIS-HEMTs. We especially focus on the embedded source field-plate structures (ESFP) for high power applications. To apply the models to simulate power switching applications including DC-DC converters, electron mobility equations are the key to characterize DC bias conditions under dynamic operations. The model is implemented in MIT Virtual Source model with modifications of Verilog-A source codes. The model parameters are extracted from measured data of the transistor test structures that we fabricated with an ESFP technology. The results show excellent agreements between measurements and simulations.

Electron Mobility and Self-Heat Modeling of AlN/GaN MIS-HEMTs with Embedded Source Field-Plate Structures

Electron mobility and self-heating models for drain current simulations of AlN/GaN MIS-HEMTs have been derived for embedded source field-plate structures. They are scalable physical models. To apply the models to simulate power switching applications including DC-DC converters, the weak inversion to linear characteristics and the maximum drain current are important. The models are implemented in MIT Virtual Source model with modifications of Verilog-A source codes. The model parameters are extracted from measured data of the transistor test structures that we fabricated with an embedded source field-plate technology. The results show excellent agreements between measurements and simulations.

Successive approximation time-to-digital converter with vernier-level resolution

This paper presents a time-to-digital converter (TDC) architecture with reduced hardware suitable for multichannel timing built-out self-test (BOST) implementation on an FPGA chip. In order to reduce the number of buffers and DFFs in a conventional Flash TDC or Vernier TDC, successive approximation is applied to construct a SAR TDC when two timing inputs are repetitive (not shingle-shot). Besides, Vernier TDC has been added as the sub-circuit to form a two-step SAR+SAR-Vernier TDC architecture. LTspice and Xilinx ISE simulation have been performed to verify its feasibility. Also discussions on several TDC architectures as BOST are described.

Study on maximum electric field modeling used for HCI induced degradation characteristic of LDMOS transistors

This paper reports a maximum electric field model of laterally diffused MOSFET (LDMOS) transistors under the condition of high current injection effect used for reliability simulations. LDMOSs operate under high-voltage and large-current biases, where electric field increases with biases at the gate edge. We present the investigation, formulations, and verifications of our maximum electric field model.