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Featured researches published by Numan S. Dogan.


southeastcon | 2005

MICS transceivers: regulatory standards and applications [medical implant communications service]

Huseyin S. Savci; Ahmet Sula; Zheng Wang; Numan S. Dogan; Ercument Arvas

The medical implant communications service (MICS) is an ultra-low power, unlicensed, mobile radio service for transmitting data in support of diagnostic or therapeutic functions associated with implanted medical devices. The US Federal Communications Commission (FCC) allocated the 402-405 MHz frequency band for MICS operations on a shared, secondary basis in 1999. Although it is a fairly new standard, its usage is rapidly increasing in medical implant devices such as cardiac pacemakers, implantable cardioverter defibrillators, neurostimulators, hearing aids and automated drug delivery systems. This paper reviews the regulatory standards and the characteristics of MICS transceivers.


BioSystems | 1995

A highly stable and selective biosensor using modified nicotinic acetylcholine receptor (nAChR)

Mete Eray; Numan S. Dogan; Steven R. Reiken; Himawan Sutisna; Bernard J. Van Wie; Alan R. Koch; David F. Moffett; Moris Silber; William C. Davis

Methods for developing stable, sensitive and selective bilayer lipid membrane (BLM)-based biosensors are discussed. Stable BLMs were formed over micromachined polyimide apertures. Selective sensors were made by incorporating nicotinic acetylcholine receptors (nAChRs) modified with bispecific antibodies (BsAbs). When two BsAbs, attached to one nAChR, encounter antigen (Ag), channels are blocked. Sensitivity to single Ag molecules would be possible by monitoring closure of individual nAChRs.


IEEE Transactions on Electron Devices | 1995

Zero-temperature-coefficient biasing point of partially depleted SOI MOSFET's

Ashraf A. Osman; Mohamed A. Osman; Numan S. Dogan; Mohamed Imam

Experimental and analytical results of the front gate bias (V/sub GS/) and the drain current (I/sub DS/) with the drain voltage (V/sub DS/) of partially depleted (PD) SOI MOSFET at the Zero-Temperature-Coefficient (ZTC) point over a very wide temperature range (25-300/spl deg/C) are presented. Two distinct ZTC points are identified, one in the linear region and the other is in the saturation region. Additionally, the analysis takes into consideration the body effects, and mobility degradation with applied front gate bias. The analysis results are in excellent agreement with the experimental results. >


Biosensors and Bioelectronics | 1994

Highly stable bilayer lipid membranes (BLMs) formed on microfabricated polyimide apertures

Mete Eray; Numan S. Dogan; Liangjun Liu; Alan R. Koch; David F. Moffett; Moris Silber; Bernard J. Van Wie

Abstract Microfabrication is used to realize a polyimide aperture for highly stable bilayer lipid membranes (BLMs). The microfabrication process used in this work is compatible with standard processes used in microelectronics. The physical features of the aperture, such as diameter, thickness and tapering of the edges are precisely controlled during the microfabrication process which results in high yield and reproducibility of the polyimide apertures. A study of BLM stability using precise measurements of specific capacitance shows that the BLM is stable up to 50 h. Alamethicin channels were successfully incorporated into these membranes further proving their bilayer nature. Vesicles containing reconstituted nicotinic acetylcholine receptors (nAChRs) were fused to the BLMs. The successful incorporation of functioning ion channel activity into highly stable BLMs promises a future class of miniature sensors that are very sensitive with fast response times.


IEEE Journal of Solid-state Circuits | 1994

DC modeling and characterization of AlGaAs/GaAs heterojunction bipolar transistors for high-temperature applications

Cemal T. Dikmen; Numan S. Dogan; Mohamed A. Osman

The large signal dc characteristics of AlGaAs/GaAs heterojunction bipolar transistors (HBT) at high temperatures (27/spl deg/-300/spl deg/C) are reported. A high-temperature SPICE model is developed which includes the recombination-generation current components and avalanche multiplication which become extremely important at high temperatures. The effect of avalanche breakdown is also included to model the current due to thermal generation of electron/hole pairs causing breakdown at high temperatures. A parameter extraction program is developed and used to extract the model parameters of HBTs at different temperatures. Fitting functions for the model parameters as a function of temperature are developed. These parameters are then used in the SPICE Ebers-Moll model for the dc characterization of the HBT at any temperature between (27/spl deg/-300/spl deg/C). >


IEEE Journal of Solid-state Circuits | 1995

An extended Tanh law MOSFET model for high temperature circuit simulation

Ashraf A. Osman; Mohamed A. Osman; Numan S. Dogan; Mohamed Imam

The Tanh law MOSFET model proposed earlier by Shousha & Aboulwafa (see ibid., vol. 28, no. 2, p. 176-9, 1993) is extended to predict the temperature dependence of the drain current by including the temperature dependence of the threshold voltage and the mobility. The model requires fewer temperature dependent parameters compared to SPICE level2 model. The extended model shows good agreement between measurement and simulation of devices with different device geometries over wide temperature range (27-200/spl deg/C). >


international symposium on circuits and systems | 2006

1-V ultra-low-power CMOS LC VCO for UHF quadrature signal generation

Zheng Wang; Huseyin S. Savci; Numan S. Dogan

Design, implementation, and simulation of ultra-low-power LC-VCOs with quadrature signal generation are presented, as well as the analysis and the comparison of several different VCO topologies. The VCO topology having the best performance is then used further for quadrature signal generation. Based on a 0.18mum RF/mixed-signal CMOS process, the VCOs are simulated using 1V supply voltage. It is demonstrated that the N- & P- MOS cross-coupled pair VCO with balance resistors operating at 1.6GHz has a power consumption of 0.1mW with as low as -121 dBc/Hz of phase noise at 1-MHz offset. To generate the quadrature signals at 400MHz, N- & P- MOS pair VCOs at the frequency of 400MHz, 800MHz, 1.6GHz, divide-by-two, and divide-by-four circuits are implemented and compared. It turns out that the frequency dividers degrade the phase noise. Comparison of FOMs shows that VCO at 800MHz followed by a divide-by-two is the best choice for quadrature signal generation at 400 MHz, achieving 177muW for the VCO and 25muW for the divider. The phase noise is -127dBc/Hz at 1-MHz offset


IEEE Transactions on Circuits and Systems | 2007

SOI CMOS Implementation of a Multirate PSK Demodulator for Space Communications

Mehmet R. Yuce; Wentai Liu; John Damiano; Bhaskar Bharath; Paul D. Franzon; Numan S. Dogan

A low-power phase-shift keying demodulator integrated circuit (IC) has been implemented using silicon-on-insulator CMOS technology for deep space and satellite applications. The demodulator employs double differential detection to increase its robustness to the Doppler shift caused by the movement of the space vehicle and sampling technique with 1-bit analog-to-digital converter (ADC) at the front to reduce the complexity and power dissipation. In particular, digital decimation is used after sampling to achieve a low power implementation of multirate transmission. Operating at ultra-high-frequency (435 MHz), the receiver system supports a wide range of data rates (0.1-100 Kbps). From test results, the power consumption of the demodulator circuit including the 1-bit ADC is below 1 mW for data rates up to 100 Kbps


international symposium on circuits and systems | 2003

A 22-mW 435 MHz silicon on insulator CMOS high-gain LNA for subsampling receivers

T. H. Huang; Ertan Zencir; Mehmet R. Yuce; Numan S. Dogan; Wentai Liu; Ercument Arvas

A low-power, high-gain Silicon on Insulator (SOI) CMOS low noise amplifier (LNA) for use as the first stage of a subsampling receiver for space application at UHF frequency is proposed for the first time. The simulated results of +80 dB available gain and 2.1-dB noise figure (NF) with very low power consumption is reported and makes it suitable for subsampling mixer with Track and Hold (T/H) circuit. The LNA contains both tuned and inductorless amplifier stages. The first stage utilizes resonant tank with on-chip capacitors and improved-Q spiral inductors. The following stage is composed of five inductorless amplifiers designed to achieve the high-gain. Both stages apply fully differential architecture with cascoded transistors to achieve high-gain, low-power at high frequencies with reasonable reverse isolation. This is the first high-gain LNA design using SOI CMOS technology.


canadian conference on electrical and computer engineering | 2002

Modeling and performance of spiral inductors in SOI CMOS technology

Ertan Zencir; Numan S. Dogan; Ercument Arvas

Modeling and performance of on-chip spiral inductors is presented. Y-parameters are obtained from the measured S-parameters of the inductor fabricated in 0.35 /spl mu/m SOI CMOS technology. Matlab is used to obtain the /spl pi/-equivalent circuit model parameters at each frequency point. The SOI CMOS inductor shows better performance characteristics in terms of Q-factor and self-resonance frequency.

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Zhijian Xie

North Carolina Agricultural and Technical State University

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Mete Eray

Washington State University

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Mohamed A. Osman

Washington State University

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Wentai Liu

University of California

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Mohammed Ketel

Information Technology University

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Paul D. Franzon

North Carolina State University

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